• Title/Summary/Keyword: Semiconductor equipment

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A Rotordynamics Analysis of High Efficiency and Hybrid Type Vacuum Pump (고효율 복합형 진공펌프의 로터다이나믹 해석)

  • Kim, Byung-Ok;Lee, An-Sung;Noh, Myung-Keun
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.17 no.10
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    • pp.967-975
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    • 2007
  • A rotordynamic analysis was performed with a dry vacuum pump, which is a major equipment in modern semiconductor and LCD manufacturing processes. The system is composed of screw rotors, lobes picking air, helical gears, driving motor, and support rolling element bearings of rotors and motor. The driving motor-screw rotor system has a rated speed of 6,300 rpm, and was modeled utilizing a rotordynamic FE method for analysis, which was verified through 3-D FE analysis and experimental modal analysis. As loadings on the bearings due to the gear action were significant in the system considered, each resultant bearing load was calculated by considering the generalized forces of the gear action as well as the rotor itself. Each resultant bearing loading was used in calculating each stiffness of rolling element bearings. Design goals are to achieve wide separation margins of lateral and torsional critical speeds, and favorable unbalance responses of the rotor in the operating range. Then, a complex rotordynamic analysis of the system was carried out to evaluate its forward synchronous critical speeds, whirl natural frequencies and mode shapes, unbalance responses under various unbalance locations, and torsional interference diagram. Results show that the entire system is well designed in the operating range. In addition, the procedure of rotordynamic analysis for dry vacuum pump rotor-bearing system was proposed and established.

A Chemically-driven Top-down Approach for the Formation of High Quality GaN Nanostructure with a Sharp Tip

  • Kim, Je-Hyeong;O, Chung-Seok;Go, Yeong-Ho;Go, Seok-Min;Jo, Yong-Hun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.48-48
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    • 2011
  • We have developed a chemically-driven top-down approach using vapor phase HCl to form various GaN nanostructures and successfully demonstrated dislocation-free and strain-relaxed GaN nanostructures without etching damage formed by a selective dissociation method. Our approach overcomes many limitations encountered in previous approaches. There is no need to make a pattern, complicated process, and expensive equipment, but it produces a high-quality nanostructure over a large area at low cost. As far as we know, this is the first time that various types of high-quality GaN nanostructures, such as dot, cone, and rod, could be formed by a chemical method without the use of a mask or pattern, especially on the Ga-polar GaN. It is well known that the Ga-polar GaN is difficult to etch by the common chemical wet etching method because of the chemical stability of GaN. Our chemically driven GaN nanostructures show excellent structure and optical properties. The formed nanostructure had various facets depending on the etching conditions and showed a high crystal quality due to the removal of defects, such as dislocations. These structure properties derived excellent optical performance of the GaN nanostructure. The GaN nanostructure had increased internal and external quantum efficiency due to increased light extraction, reduced strain, and improved crystal quality. The chemically driven GaN nanostructure shows promise in applications such as efficient light-emitting diodes, field emitters, and sensors.

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A study on the Digital contents for Estimated Thickness Algorithm of Silicon wafer (실리콘웨이퍼 평탄도 추정 알고리즘을 위한 디지털 컨덴츠에 관한 연구)

  • Song Eun-Jee
    • Journal of Digital Contents Society
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    • v.5 no.4
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    • pp.251-256
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    • 2004
  • The flatness of a silicon wafer concerned with ULSI chip is one of the most critical parameters ensuring high yield of wafers. That is necessary to constitute the circuit with high quality for he surface of silicon wafer, which comes to be base to make the direct circuit of the semiconductor, Flatness, therefore, is the most important factor to guarantee it wafer with high quality. The process of polishing is one of the most crucial production line among 10 processing stages to change the rough surface into the flatnees with best quality. Currently at this process, it is general for an engineer in charge to observe, judge and control the model of wafer from the monitor of measuring equipment with his/her own eyes to enhance the degree of flatness. This, however, is quite a troublesome job for someone has to check of process by one's physical experience. The purpose of this study is to approach the model of wafer with digital contents and to apply the result of the research for an algorithm which enables to control the polishing process by means of measuring the degree of flatness automatically, not by person, but by system. In addition, this paper shows that this algorithm proposed for the whole wafer flatness enables to draw an estimated algorithm which is for the thickness of sites to measure the degree of flatness for each site of wafer.

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Large Scale Treatment of Perfluorocompounds Using a Thermal Plasma Scrubber

  • Han, Sung-Han;Park, Hyun-Woo;Kim, Tae-Hee;Park, Dong-Wha
    • Clean Technology
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    • v.17 no.3
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    • pp.250-258
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    • 2011
  • Thermal plasma has been presented for the decomposition of perfluorocompounds (PFCs) which are extensively used in the semiconductor manufacturing and display industry. We developed pilot-scale equipment to investigate the large scale treatment of PFCs and called it a "thermal plasma scrubber". PFCs such as $CF_4$, $C_2F_6$, $SF_6$, and $NF_3$ used in experiments were diluted with $N_2$. There were two different types of experiment setup related to the water spray direction inside the thermal plasma scrubber. The first type was that the water was sprayed directly into the gas outlet located at the exit of the reaction section. The second type was that the water was sprayed on the wall of the quenching section. More effective decomposition took place when the water was sprayed on the quenching section wall. For $C_2F_6$, $SF_6$, and $NF_3$ the maximum destruction and removal efficiency was nearly 100%, and for $CF_4$ was up to 93%.

High $f_T$ 30nm Triple-Gate $In_{0.7}GaAs$ HEMTs with Damage-Free $SiO_2/SiN_x$ Sidewall Process and BCB Planarization

  • Kim, Dae-Hyun;Yeon, Seong-Jin;Song, Saegn-Sub;Lee, Jae-Hak;Seo, Kwang-Seok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.2
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    • pp.117-123
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    • 2004
  • A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

TLC NAND-type Flash Memory Built-in Self Test (TLC NAND-형 플래시 메모리 내장 자체테스트)

  • Kim, Jin-Wan;Chang, Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.12
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    • pp.72-82
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    • 2014
  • Recently, the size of semiconductor industry market is constantly growing, due to the increase in diffusion of smart-phone, tablet PC and SSD(Solid State Drive). Also, it is expected that the demand for TLC NAND-type flash memory would gradually increase, with the recent release of TLC NAND-type flash memory in the SSD market. There have been a lot of studies on SLC NAND flash memory, but no research on TLC NAND flash memory has been conducted, yet. Also, a test of NAND-type flash memory is depending on a high-priced external equipment. Therefore, this study aims to suggest a structure for an autonomous test with no high-priced external test device by modifying the existing SLC NAND flash memory and MLC NAND flash memory test algorithms and patterns and applying them to TLC NAND flash memory.

Non-contact Transportation of Flat Panel Substrate by Combined Ultrasonic Acoustic Viscous and Aerostatic Forces

  • Isobe, Hiromi;Fushimi, Masaaki;Ootsuka, Masami;Kyusojin, Akira
    • International Journal of Precision Engineering and Manufacturing
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    • v.8 no.2
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    • pp.44-48
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    • 2007
  • In recent years, the size of plane substrates and semiconductor wafers has increased. As conventional contact transportation systems composed of, for example, carrier rollers, belt conveyers, and robot hands carry these longer and wider substrates, the increased weight results in increased potential for fracture. A noncontact transportation system is required to solve this problem. We propose a new noncontact transportation system combining acoustic viscous and aerostatic forces to provide damage-free transport. In this system, substrates are supported by aerostatic force and transported by acoustic viscous streaming induced by traveling wave deformation of a disk-type stator. A ring-type piezoelectric transducer bonded on the stator excites vibration. A stator with a high Q piezoelectric transducer can generate traveling vibrations with amplitude of $3.2{\mu}m$. Prior to constructing a carrying road for substrates, we clarified the basic properties of this technique and stator vibration characteristics experimentally. We constructed the experimental equipment using a rotational disk with a 95-mm diameter. Electric power was 70 W at an input voltage of 200 Vpp. A rotational torque of $8.5\times10^{-5}Nm$ was obtained when clearance between the stator and disk was $120{\mu}m$. Finally, we constructed a noncontact transport apparatus for polycrystalline silicon wafers $(150(W)\times150(L)\times0.3(t))$, producing a carrying speed of 59.2 mm/s at a clearance of 0.3 mm between the stator and wafer. The carrying force when four stators acted on the wafer was $2\times10^{-3}N$. Thus, the new noncontact transportation system was demonstrated to be effective.

Fundamental Study on the Maintenance Technology for SF6 Gas Condition using Pressure and UHF Sensors (UHF 및 가스센서를 이용한 SF6 가스 상태 감시기술 기초연구)

  • Ahn, Hee-Sung;Cho, Sung-Chul;Eom, Ju-Hong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.2
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    • pp.20-27
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    • 2007
  • [ $SF_6$ ] gas for compacted power facilities has a important role as an insulation gas. It is very blown well that $SF_6$ gas has the superior characteristics as an insulation gas. For reliable operation of SF6-gas-based high and medium voltage equipment it is very important to keep the insulation ability within a safe range. And the experimental and measuring system were implemented. The test chamber designed to endure up to 3 atmospheric pressure. The analysis results of the experimental data shows that positive partial discharge can be detected by discharge current and UHF signal. Additionally it is shown the possibility that $CO_2$ gas sensor of semiconductor type can be detect the variation of $SF_6$ gas condition. The UHF sensor shows good feature to detect the variation of $SF_6$ gas condition for partial discharge and breakdown discharge.

Fault Detection of Reactive Ion Etching Using Time Series Support Vector Machine (Time Series Support Vector Machine을 이용한 Reactive Ion Etching의 오류검출 및 분석)

  • Park Young-Kook;Han Seung-Soo;Hong Sang-J.
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.247-250
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    • 2006
  • Maximizing the productivity in reactive ion etching, early detection of process equipment anomaly became crucial in current high volume semiconductor manufacturing environment. To address the importance of the process fault detection for productivity, support vector machines (SVMs) is employed to assist the decision to determine process faults in real-time. SVMs for eleven steps of etching runs are established with data acquired from baseline runs, and they are further verified with the data from controlled (acceptable) and perturbed (unacceptable) runs. Then, each SVM is further utilized for the fault detection purpose utilizing control limits which is well understood in statistical process control chart. Utilizing SVMs, fault detection of reactive ion etching process is demonstrated with zero false alarm rate of the controlled runs on a run to run basis.

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The Effect of 3mW Semiconductor Laser Irradiation on Cell Proliferation (세포 증식에서 3mW 반도체 레이저 조사가 미치는 효과)

  • Cheon, Min-Woo;Park, Yong-Pil;Lee, Ho-Shik;Kim, Tae-Gon;Kim, Young-Pyo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.572-573
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    • 2010
  • This paper performed the basic study for fabricating the low level laser therapy apparatus, and one of the goals of this paper was to make this apparatus used handily. The equipment was fabricated using the 655nm laser diode and microcontroller unit and designed to enable us to control light irradiation time, and reservation.. In case of cell proliferation experiment, each experiment was performed to irradiation group and non-irradiation group for bome marrow cell. MTT assay method was chosen to verify the cell increase of two groups and the effect of irradiation on cell proliferation was examined by measuring.

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