• Title/Summary/Keyword: Semiconductor Testing

Search Result 140, Processing Time 0.021 seconds

Optimal Design of Ultrasonic Horn for Ultrasonic Drilling Processing of Ceramic Material (세라믹 소재 초음파 드릴링 가공을 위한 초음파 Horn의 최적 설계에 관한 연구)

  • Cha, Seung-hwan;Yang, Dong-ho;Lee, Sang-hyeop;Lee, Jong-Chan
    • Journal of the Korean Society of Manufacturing Process Engineers
    • /
    • v.21 no.9
    • /
    • pp.1-11
    • /
    • 2022
  • Recently, there has been continuous technological development in the semiconductor industry, and semiconductor manufacturing technologies are being advanced and highly integrated. For this reason, ceramic material having excellent heat resistance, wear resistance, and conductivity are used as components in semiconductor manufacturing. Among them, the probe card's space transformer is used as ceramic material to prevent electronic signal noise during the electrical die sorting of semiconductor function testing. However, implementing a bulk-type space transformer with a thickness of 5.6 mm or more is challenging, and thus it is produced in a structure with a stacked ceramic film. The stacked space transformer has low productivity because it is difficult to ensure hole clogging and a precise shape. In this research, an ultrasonic horn is designed to manufacture a bulk-type ceramic space transformer through ultrasonic drilling. Vibration characteristics were analyzed according to the ultrasonic horn, and the natural frequency was measured.

A Method of Test Case Generation Based on Behavioral Model for Automotive SPICE (Automotive SPICE를 위한 행위 모델 기반의 테스트 케이스 생성 기법)

  • Kim, Choong S.;Yang, Jae-Soo;Park, Young B.
    • Journal of the Semiconductor & Display Technology
    • /
    • v.16 no.3
    • /
    • pp.71-77
    • /
    • 2017
  • As the automobile industry has shifted to software, the Automotive SPICE standard has been established to ensure efficient product development process and quality. In the assessment model, the HIS Scope is the minimum standard for small and medium automotive electric companies to meet OEM requirements. However, in order to achieve the HIS Scope, the output of each process stage that meets the verification criteria of Automotive SPICE must be created. In particular, the test phase takes a lot of resources, which is a big burden for small and medium-sized companies. In this paper, we propose a methodology for creating test cases of software integration test phase based on UML sequence diagram, which is a software design phase of Automotive SPICE HIS Scope, by applying behavior model based testing method. We also propose a tool chain for automating the creation process. This will reduce the resources required to create a test case.

  • PDF

Internal Defect Position Analysis of a Multi-Layer Chip Using Lock-in Infrared Microscopy (위상잠금 적외선 현미경 관찰법을 이용한 다층구조 칩의 내부결함 위치 분석)

  • Kim, Seon-Jin;Lee, Kye-Sung;Hur, Hwan;Lee, Haksun;Bae, Hyun-Cheol;Choi, Kwang-Seong;Kim, Ghiseok;Kim, Geon-Hee
    • Journal of the Korean Society for Nondestructive Testing
    • /
    • v.35 no.3
    • /
    • pp.200-205
    • /
    • 2015
  • An ultra-precise infrared microscope consisting of a high-resolution infrared objective lens and infrared sensors is utilized successfully to obtain location information on the plane and depth of local heat sources causing defects in a semiconductor device. In this study, multi-layer semiconductor chips are analyzed for the positional information of heat sources by using a lock-in infrared microscope. Optimal conditions such as focal position, integration time, current and lock-in frequency for measuring the accurate depth of the heat sources are studied by lock-in thermography. The location indicated by the results of the depth estimate, according to the change in distance between the infrared objective lens and the specimen is analyzed under these optimal conditions.

A Study on the Development of Qualification for Semiconductor Machine Maintenance (반도체장비유지보수 자격개발에 관한 연구)

  • Kang, Seok-Ju
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.13 no.6
    • /
    • pp.2472-2478
    • /
    • 2012
  • This research is aiming to develop Semiconductor equipment maintenance certification course to train qualified maintenance experts more effectively requested in related semiconductor industry. In the course of research, we adopted diverse research technique such as interview, on-spot investigation, documentary references to analyze current status of related training facilities, and forecast the population of test applicants. We analyzed similar certification course(Craftsman SMT, Industrial Engineer SMT, Craftsman Mechatronics, Industrial Enginee Mechatronics, et) as reference to set up job objectives and curriculum of semiconductor equipment maintenance certification. We conducted survey on expectations on newly created certificate, presented evaluation standard and objective of test, and preliminary writing test and demonstration test. Based on the result of various research, we were able to present training program for semiconductor equipment maintenance certification and set the assessment standard of qualification exam.

A GaAs Power MESFET Operating at 3.3V Drain Voltage for Digital Hand-Held Phone

  • Lee, Jong-Lam;Kim, Hae-Cheon;Mun, Jae-Kyung;Kwon, Oh-Seung;Lee, Jae-Jin;Hwang, In-Duk;Park, Hyung-Moo
    • ETRI Journal
    • /
    • v.16 no.4
    • /
    • pp.1-11
    • /
    • 1995
  • A GaAs power metal semiconductor field effect transistor (MESFET) operating at a voltage as low as 3.3V has been developed with the best performance for digital handheld phone. The device has been fabricated on an epitaxial layer with a low-high doped structure grown by molecular beam epitaxy. The MESFET, fabricated using $0.8{\mu}m$ design rule, showed a maximum drain current density of 330 mA/mm at $V_{gs}$ =0.5V and a gate-to-drain breakdown volt-age of 28 V. The MESFET tested at a 3.3 V drain bias and a 900 MHz operation frequency displayed an output power of 32.5-dBm and a power added efficiency of 68%. The associate power gain at 20 dBm input power and the linear gain were 12.5dB and 16.5dB, respectively. Two tone testing measured at 900.00MHz and 900.03MHz showed that a third-order intercept point is 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order intermodulation.

  • PDF

The Sources and Directions of Technological Capability Accumulation in Korean Semiconductor industry

  • Rim, Myung-Hwan;Choung, Jae-Yong;Hwang, Hye-Ran
    • ETRI Journal
    • /
    • v.20 no.1
    • /
    • pp.55-73
    • /
    • 1998
  • In this paper we analyze the technological accumulation processes in the Korean semiconductor industry from the institutional approach. Institutional approach, which is closely connected with Neo-Schumpeterian tradition, has emerged as an alternative theoretical framework to neoclassical approach to understand the process of producing technological knowledge. Traditional wisdom of neoclassical approach revealed the limitation to explain the complex nature of knowledge creation and diffusion. US patent data are analyzed in terms of the increasing trend of numbers and its content to measure the rate and direction of technological capability accumulation. This analysis shows that semiconductor technologies are one of the fastest growing fields among Korean technological activities. Moreover, the analysis of patent content suggests that fabrication technologies are the most important area within the technological development of semiconductors, whilst circuit design and testing technologies are beginning to increase in significance. In addition, it is examined how private sectors and public institutions have contributed to generate technological capabilities, and the relationship between them has been changed during the development processes. It is found that Korean firms enhanced their technological capabilities from the learning and assimilation of imported technology to enhanced in-house R&D capabilities in the later stage. The support of public institution and government policy also played significant role to this successful transformation in conjunction with vigorous R&D investment of public sector.

  • PDF

A Deep Learning-Based Model for Predicting Traffic Congestion in Semiconductor Fabrication (딥러닝을 활용한 반도체 제조 물류 시스템 통행량 예측모델 설계)

  • Kim, Jong Myeong;Kim, Ock Hyeon;Hong, Sung Bin;Lim, Dae-Eun
    • Journal of Industrial Technology
    • /
    • v.39 no.1
    • /
    • pp.27-31
    • /
    • 2019
  • Semiconductor logistics systems are facing difficulties in increasing production as production processes become more complicated due to the upgrading of fine processes. Therefore, the purpose of the research is to design predictive models that can predict traffic during the pre-planning stage, identify the risk zones that occur during the production process, and prevent them in advance. As a solution, we build FABs using automode simulation to collect data. Then, the traffic prediction model of the areas of interest is constructed using deep learning techniques (keras - multistory conceptron structure). The design of the predictive model gave an estimate of the traffic in the area of interest with an accuracy of about 87%. The expected effect can be used as an indicator for making decisions by proactively identifying congestion risk areas during the Fab Design or Factory Expansion Planning stage, as the maximum traffic per section is predicted.

Human body model electrostatic discharge tester using metal oxide semiconductor-controlled thyristors

  • Dong Yun Jung;Kun Sik Park;Sang In Kim;Sungkyu Kwon;Doo Hyung Cho;Hyun Gyu Jang;Jongil Won;Jong-Won Lim
    • ETRI Journal
    • /
    • v.45 no.3
    • /
    • pp.543-550
    • /
    • 2023
  • Electrostatic discharge (ESD) testing for human body model tests is an essential part of the reliability evaluation of electronic/electrical devices and components. However, global environmental concerns have called for the need to replace the mercury-wetted relay switches, which have been used in ESD testers. Therefore, herein, we propose an ESD tester using metal oxide semiconductor-controlled thyristor (MCT) devices with a significantly higher rising rate of anode current (di/dt) characteristics. These MCTs, which have a breakdown voltage beyond 3000 V, were developed through an in-house foundry. As a replacement for the existing mercury relays, the proposed ESD tester with the developed MCT satisfies all the requirements stipulated in the JS-001 standard for conditions at or below 2000 V. Moreover, unlike traditional relays, the proposed ESD tester does not generate resonance; therefore, no additional circuitry is required for resonant removal. To the best of our knowledge, the proposed ESD tester is the first study to meet the JS-001 specification by applying a new switch instead of an existing mercury-wetted relay.

Photoluminescence Up-conversion in GaAs/AlGaAs Heterostructures

  • Cheong, Hyeonsik M.
    • Journal of Korean Vacuum Science & Technology
    • /
    • v.6 no.2
    • /
    • pp.58-61
    • /
    • 2002
  • Photoluminescence up-conversion in semiconductor heterostructures is a phenomenon in which luminescence occurs at energies higher than that of the excitation photons. It has been observed in many semiconductor heterostructure systems, including InP/AnALAs, CdTe/CdMgTe, GaAs/ordered-(Al)GalnP, GaAs/AIGaAs, and InAs/GaAs. In this wort, GaAs/AIGaAs heterostructures are used as a model system to study the mechanism of the up-conversion process. This system is ideal for testing different models because the band offsets are quite well documented. Different heterostructures are designed to study the effect of disorder on the up-converted luminescence efficiency. In order to study the roles of different types of carriers, the effect of doping was investigated. It was found that the up-converted luminescence is significantly enhanced by p-type doping of the higher-band-gap material.

  • PDF

Technology of MRAM (Magneto-resistive Random Access Memory) Using MTJ(Magnetic Tunnel Junction) Cell

  • Park, Wanjun;Song, I-Hun;Park, Sangjin;Kim, Teawan
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.2 no.3
    • /
    • pp.197-204
    • /
    • 2002
  • DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.