• 제목/요약/키워드: Semiconductor Testing

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세라믹 소재 초음파 드릴링 가공을 위한 초음파 Horn의 최적 설계에 관한 연구 (Optimal Design of Ultrasonic Horn for Ultrasonic Drilling Processing of Ceramic Material)

  • 차승환;양동호;이상협;이종찬
    • 한국기계가공학회지
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    • 제21권9호
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    • pp.1-11
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    • 2022
  • Recently, there has been continuous technological development in the semiconductor industry, and semiconductor manufacturing technologies are being advanced and highly integrated. For this reason, ceramic material having excellent heat resistance, wear resistance, and conductivity are used as components in semiconductor manufacturing. Among them, the probe card's space transformer is used as ceramic material to prevent electronic signal noise during the electrical die sorting of semiconductor function testing. However, implementing a bulk-type space transformer with a thickness of 5.6 mm or more is challenging, and thus it is produced in a structure with a stacked ceramic film. The stacked space transformer has low productivity because it is difficult to ensure hole clogging and a precise shape. In this research, an ultrasonic horn is designed to manufacture a bulk-type ceramic space transformer through ultrasonic drilling. Vibration characteristics were analyzed according to the ultrasonic horn, and the natural frequency was measured.

Automotive SPICE를 위한 행위 모델 기반의 테스트 케이스 생성 기법 (A Method of Test Case Generation Based on Behavioral Model for Automotive SPICE)

  • 김충석;양재수;박용범
    • 반도체디스플레이기술학회지
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    • 제16권3호
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    • pp.71-77
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    • 2017
  • As the automobile industry has shifted to software, the Automotive SPICE standard has been established to ensure efficient product development process and quality. In the assessment model, the HIS Scope is the minimum standard for small and medium automotive electric companies to meet OEM requirements. However, in order to achieve the HIS Scope, the output of each process stage that meets the verification criteria of Automotive SPICE must be created. In particular, the test phase takes a lot of resources, which is a big burden for small and medium-sized companies. In this paper, we propose a methodology for creating test cases of software integration test phase based on UML sequence diagram, which is a software design phase of Automotive SPICE HIS Scope, by applying behavior model based testing method. We also propose a tool chain for automating the creation process. This will reduce the resources required to create a test case.

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위상잠금 적외선 현미경 관찰법을 이용한 다층구조 칩의 내부결함 위치 분석 (Internal Defect Position Analysis of a Multi-Layer Chip Using Lock-in Infrared Microscopy)

  • 김선진;이계승;허환;이학선;배현철;최광성;김기석;김건희
    • 비파괴검사학회지
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    • 제35권3호
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    • pp.200-205
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    • 2015
  • 현대의 컴팩트 반도체 소자들은 정확한 품질검사를 위해 비파괴, 고분해능의 검사 장비가 요구되고 있다. 검사 장비 중 고분해능 적외선 대물렌즈와 적외선 센서로 구성된 초정밀 열영상 현미경은 반도체 내부의 결함에서 발생되는 국소적 열원의 위치와 깊이 정보를 얻는데 유용하게 활용되고 있다. 본 연구에서는 위 상잠금기법이 적용된 적외선열영상 현미경을 이용하여 다층구조로 된 반도체 소자 내부 열원의 위치와 깊이 정보에 대해 분석하였다. 시편은 내부에 3개의 열원을 포함한 TSV(through silicon via technology) 기반 4단 적층구조로서 측정 표면으로부터 열원의 깊이는 $240{\mu}m$이다. 본 실험에서는 위상잠금기법을 통해 시편 내부열원의 위치와 깊이를 정확히 찾을 수 있는 초점면 위치, 노출시간 그리고 위상잠금주파수 등 최적의 조건을 찾고 그 조건에서 적외선 대물렌즈와 시편의 거리 변화에 따른 위상 변이와 깊이 정보에 대한 영향을 알아보았다. 이와 같은 반도체 내부결함에 의한 열원의 위치와 깊이 분석에 대한 연구는 품질검사용 열영상 분석장비 개발에 큰 도움을 줄 것으로 예상한다.

반도체장비유지보수 자격개발에 관한 연구 (A Study on the Development of Qualification for Semiconductor Machine Maintenance)

  • 강석주
    • 한국산학기술학회논문지
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    • 제13권6호
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    • pp.2472-2478
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    • 2012
  • 본 연구는 반도체 산업에서 반도체장비 유지보수에 사용되어지는 반도체장비 유지보수 분야의 전문기술인력을 효과적으로 양성할 수 있는 반도체장비 유지보수의 자격종목을 개발하고자 하는데 그 목적이 있다. 연구의 목적을 달성하기 위하여 반도체장비 유지보수 분야의 국내외 실태 조사, 문헌조사를 통하여 반도체장비 유지보수 관련 교육훈련기관 및 검정 수요 예상 인력을 파악했으며, 유사자격제도(전자부품장착기능사, 전자부품장착산업기사, 생산자동화기능사, 생산자동화산업기사)를 분석하였고, 직무분석을 통하여 반도체장비유지보수기능사의 직무 및 교육내용을 분석하였다. 또한 반도체장비 유지보수 자격종목 신설에 대한 설문조사를 실시했으며, 반도체장비유지보수기능사 자격종목의 출제기준 및 채점 방법을 제시했고, 필기시험과 실기시험에 대한 모의 검정시험도 실시하였다. 이러한 결과를 토대로 반도체장비유지보수기능사에 대한 교육프로그램을 만들었으며, 자격검정을 실시할 수 있는 출제기준을 제시하였다.

A GaAs Power MESFET Operating at 3.3V Drain Voltage for Digital Hand-Held Phone

  • Lee, Jong-Lam;Kim, Hae-Cheon;Mun, Jae-Kyung;Kwon, Oh-Seung;Lee, Jae-Jin;Hwang, In-Duk;Park, Hyung-Moo
    • ETRI Journal
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    • 제16권4호
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    • pp.1-11
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    • 1995
  • A GaAs power metal semiconductor field effect transistor (MESFET) operating at a voltage as low as 3.3V has been developed with the best performance for digital handheld phone. The device has been fabricated on an epitaxial layer with a low-high doped structure grown by molecular beam epitaxy. The MESFET, fabricated using $0.8{\mu}m$ design rule, showed a maximum drain current density of 330 mA/mm at $V_{gs}$ =0.5V and a gate-to-drain breakdown volt-age of 28 V. The MESFET tested at a 3.3 V drain bias and a 900 MHz operation frequency displayed an output power of 32.5-dBm and a power added efficiency of 68%. The associate power gain at 20 dBm input power and the linear gain were 12.5dB and 16.5dB, respectively. Two tone testing measured at 900.00MHz and 900.03MHz showed that a third-order intercept point is 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order intermodulation.

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The Sources and Directions of Technological Capability Accumulation in Korean Semiconductor industry

  • Rim, Myung-Hwan;Choung, Jae-Yong;Hwang, Hye-Ran
    • ETRI Journal
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    • 제20권1호
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    • pp.55-73
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    • 1998
  • In this paper we analyze the technological accumulation processes in the Korean semiconductor industry from the institutional approach. Institutional approach, which is closely connected with Neo-Schumpeterian tradition, has emerged as an alternative theoretical framework to neoclassical approach to understand the process of producing technological knowledge. Traditional wisdom of neoclassical approach revealed the limitation to explain the complex nature of knowledge creation and diffusion. US patent data are analyzed in terms of the increasing trend of numbers and its content to measure the rate and direction of technological capability accumulation. This analysis shows that semiconductor technologies are one of the fastest growing fields among Korean technological activities. Moreover, the analysis of patent content suggests that fabrication technologies are the most important area within the technological development of semiconductors, whilst circuit design and testing technologies are beginning to increase in significance. In addition, it is examined how private sectors and public institutions have contributed to generate technological capabilities, and the relationship between them has been changed during the development processes. It is found that Korean firms enhanced their technological capabilities from the learning and assimilation of imported technology to enhanced in-house R&D capabilities in the later stage. The support of public institution and government policy also played significant role to this successful transformation in conjunction with vigorous R&D investment of public sector.

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딥러닝을 활용한 반도체 제조 물류 시스템 통행량 예측모델 설계 (A Deep Learning-Based Model for Predicting Traffic Congestion in Semiconductor Fabrication)

  • 김종명;김옥현;홍성빈;임대은
    • 산업기술연구
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    • 제39권1호
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    • pp.27-31
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    • 2019
  • Semiconductor logistics systems are facing difficulties in increasing production as production processes become more complicated due to the upgrading of fine processes. Therefore, the purpose of the research is to design predictive models that can predict traffic during the pre-planning stage, identify the risk zones that occur during the production process, and prevent them in advance. As a solution, we build FABs using automode simulation to collect data. Then, the traffic prediction model of the areas of interest is constructed using deep learning techniques (keras - multistory conceptron structure). The design of the predictive model gave an estimate of the traffic in the area of interest with an accuracy of about 87%. The expected effect can be used as an indicator for making decisions by proactively identifying congestion risk areas during the Fab Design or Factory Expansion Planning stage, as the maximum traffic per section is predicted.

Human body model electrostatic discharge tester using metal oxide semiconductor-controlled thyristors

  • Dong Yun Jung;Kun Sik Park;Sang In Kim;Sungkyu Kwon;Doo Hyung Cho;Hyun Gyu Jang;Jongil Won;Jong-Won Lim
    • ETRI Journal
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    • 제45권3호
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    • pp.543-550
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    • 2023
  • Electrostatic discharge (ESD) testing for human body model tests is an essential part of the reliability evaluation of electronic/electrical devices and components. However, global environmental concerns have called for the need to replace the mercury-wetted relay switches, which have been used in ESD testers. Therefore, herein, we propose an ESD tester using metal oxide semiconductor-controlled thyristor (MCT) devices with a significantly higher rising rate of anode current (di/dt) characteristics. These MCTs, which have a breakdown voltage beyond 3000 V, were developed through an in-house foundry. As a replacement for the existing mercury relays, the proposed ESD tester with the developed MCT satisfies all the requirements stipulated in the JS-001 standard for conditions at or below 2000 V. Moreover, unlike traditional relays, the proposed ESD tester does not generate resonance; therefore, no additional circuitry is required for resonant removal. To the best of our knowledge, the proposed ESD tester is the first study to meet the JS-001 specification by applying a new switch instead of an existing mercury-wetted relay.

Photoluminescence Up-conversion in GaAs/AlGaAs Heterostructures

  • Cheong, Hyeonsik M.
    • Journal of Korean Vacuum Science & Technology
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    • 제6권2호
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    • pp.58-61
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    • 2002
  • Photoluminescence up-conversion in semiconductor heterostructures is a phenomenon in which luminescence occurs at energies higher than that of the excitation photons. It has been observed in many semiconductor heterostructure systems, including InP/AnALAs, CdTe/CdMgTe, GaAs/ordered-(Al)GalnP, GaAs/AIGaAs, and InAs/GaAs. In this wort, GaAs/AIGaAs heterostructures are used as a model system to study the mechanism of the up-conversion process. This system is ideal for testing different models because the band offsets are quite well documented. Different heterostructures are designed to study the effect of disorder on the up-converted luminescence efficiency. In order to study the roles of different types of carriers, the effect of doping was investigated. It was found that the up-converted luminescence is significantly enhanced by p-type doping of the higher-band-gap material.

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Technology of MRAM (Magneto-resistive Random Access Memory) Using MTJ(Magnetic Tunnel Junction) Cell

  • Park, Wanjun;Song, I-Hun;Park, Sangjin;Kim, Teawan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권3호
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    • pp.197-204
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    • 2002
  • DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.