• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.219-223
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• 2005

Nowadays laser cutting is the most promising method of cutting FPD(Flat Panel Display) glass in mass-production line. And this method can also be used to cut other brittle materials such as quartz, sapphire, ceramic and semiconductor The concept of this method is shown in picture 1. Laser beam heats glass up to strain point, not to melting point and cooling system chills glass to induce maximun thermal stress in glass surface and then the thermal stress generates micro thermal crack, in other words blind depth of crack, along laser beam and cooling line.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.16 no.5
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• pp.162-165
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• 2007

TFT-LCD process has two advantages as compared with the semiconductor-process. It is that cycle time is short and number of the final products are small. But it needs complicated inspection / assembly line to be treated manually and much higher labor costs in the TFT-LCD process. Also, It is necessary to build PICS(Production Information and Control System) which is automated and intelligent. In this paper, an automated process of LCD module assembly line that can increase productivity and reduce the cost of production to strengthen the competitiveness corresponding with global market is planned in comparison with its manual/semi-auto. It is noted that The automated line for COG$\sim$FOG process replacing with the existing facilities had the following effects; the productivity is increased to about 1.5 times and labor cost reduced 85%. In addition, whole assembly line can be short and simple.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2001.10a
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• pp.298-301
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• 2001

In semiconductor manufacturing, wafer fabrication is the most complicated and important process, which is composed of several hundreds of process steps and several hundreds of machines involved. The productivity of the manufacturing mainly depends on how well they control balance of WIP flow to achieve maximal throughput under short manufacturing cycle time. In this paper mathematical formulation is suggested for the stepper scheduling, in which cycle time reduction and maximal production is achieved.

• Journal of the Korean Operations Research and Management Science Society
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• v.20 no.1
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• pp.27-34
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• 1995

In this paper, we have developed a model to determine the input quantity to be processed at each stage of a multi-stage production system in which the yield at each stage may be random and may need reworking at this stage. Yield randomness. especially in a semiconductor industry, is a most challenging problem for production control. The demand for flnal product is uncertain. We have extended the model proposed in Park and Kim[9] to consider a multiple number of reworkings which can be done at any stage prior to or tat the stage whose output in bad, depending on the level of the defect.

• IE interfaces
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• v.25 no.2
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• pp.264-275
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• 2012

The process of semiconductor(IC Package) manufacturing usually includes lots of complex and sequential processes. Many kinds of equipments are installed with the mixed concept of serial and parallel manufacturing system. The business environments of the semiconductor industry have been changed frequently, because new technologies are developed continuously. It is the main reason of new investment plan and layout consideration. However, it is difficult to change the layout after installation, because the major equipments are expensive and difficult to move. Furthermore, it is usually a multiple-objective problem. Thus, new investment or layout change should be carefully considered when the production environments likewise product mix and production quantity are changed. This paper introduces a simulation case study of a Korean company that produces packaging substrates(especially lead frames) and requires multi-objective decision support. $QUEST^{(R)}$ is used for simulation modelling and AHP(Analytic Hierarchy Process) and DEA(Data Envelopment Analysis) are used for weighting of qualitative performance measures and solving multiple-objective layout problem, respectively.

• Journal of Korea Multimedia Society
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• v.3 no.4
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• pp.407-415
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• 2000

The ultimate goal of flow control in the semiconductor fabrication process, one of the most equipment-intensive and complex manufacturing process, is to reduce lead time and work in process. In this paper, we propose stand alone layout in the form of job shop using group technology to improve the Productivity and eliminate the inefficiency in FMS (flexible manufacture system). The performance of stand alone layout and in-line layout are analyzed and compared while varying number of device variable chanties. The analysis of in-line layout is obtained by examining its adoption in the memory products of semiconductor factory. The comparison is performed through simulation using ProSys; a window 95 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, in-line layout is more efficient in terms of production Quantity. However, as the number of device variable change is more than 14 times, stand alone layout prevails over in-line layout.

• IE interfaces
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• v.10 no.1
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• pp.15-22
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• 1997

In semiconductor manufacturing, the probe process between fabrication and assembly process is constrained mostly by the equipment capacity because most products pass through the similar procedures. The probe process is usually performed in a batch mode with relatively short cycle times. The capability of the probe process can be determined by the optimal combination of the equipments and the products. A probe line usually has several types of equipment with different capacity. In this study, the probe line is modeled in terms of capacity to give the efficient planning and control procedure. For the practical usage, the hierarchical capacity planning procedure is used. First, a monthly capacity plan is made to meet the monthly production plan of each product. Secondly, the daily capacity planning is performed by considering the monthly capacity plan and the daily fabrication output. Simple heuristic algorithms for daily capacity planning are developed and some experimental results are shown.

• Journal of the Semiconductor & Display Technology
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• v.16 no.3
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• pp.121-126
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• 2017

EES System support to maximize equipment efficiency by providing real-time information of main equipment which has a significant effect on product quality and productivity, and to prevent equipment failure by detecting equipment abnormality in advance. Smart Equipment Engineering System(S-EES) integrates the activities performed at equipment that are the core of production activities and manages them by system so as to maximize the efficiency of equipment and raise the quality level of products to one level. In other words, when the product is put into the equipment, the recipe is downloaded through the RMS, the recipe is set to the optimal condition through R2R(process control), and the system detects and controls the abnormality of the equipment during operation through the FDC function in real time it means. In this way, we are working with the suitable recipe that matches the lot of product, detecting the abnormality of the equipment during operation, preventing the product from being defective, and establishing a system to maximize the efficiency through real-time equipment management. In this study, we review the present status and problems of equipment management in actual production lines, collect the requirements of the manufacturing line for the PCB line, design and develop the system, The measurement model was studied.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.15-20
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• 2011

The lithography system installed inside precision industry's (e.g. TFT-LCD) production factories are increasing in size, thereby increasing its dynamic load along with it. Such condition causes vibration within the area where the system is installed, which then negatively affects the production line to produce defective products. To prevent this type of situation, the facilities should adopt dynamic design that considers the lithography system's dynamic load. This study predicts the maximum value allowed for dynamic stiffness (which is a ratio of vibration response against a single unit of the dynamic load) of the lithography system and explains the result of its application on actual structures inside the facilities.

• Journal of the Korea Society for Simulation
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• v.19 no.1
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• pp.1-11
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• 2010

K company produces semiconductor package products under the make-to-order policy to supply for domestic and foreign semiconductor manufacturing companies. Its production process is a machine-paced assembly line type, which consists of die sawing, assembly, and test. This paper suggests three plans to increase process throughput based on the process analysis of K company and evaluates them via a simulation model using a real data collected. The three plans are line balancing by adding machines to the bottleneck process, product group scheduling, and reallocation of the operators in non-bottleneck processes. The evaluation result shows the highest daily throughput increase of 17.3% with an effect of 2.8% reduction of due date violation when the three plans are applied together. Payback period for the mixed application of the three plans is obtained as 1.37 years.