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http://dx.doi.org/10.9709/JKSS.2010.19.1.001

A Study on Throughput Increase in Semiconductor Package Process of K Manufacturing Company Using a Simulation Model  

Chai, Jong-In (경희대학교 산업경영공학과)
Park, Yang-Byung (경희대학교 산업경영공학과)
Publication Information
Journal of the Korea Society for Simulation / v.19, no.1, 2010 , pp. 1-11 More about this Journal
Abstract
K company produces semiconductor package products under the make-to-order policy to supply for domestic and foreign semiconductor manufacturing companies. Its production process is a machine-paced assembly line type, which consists of die sawing, assembly, and test. This paper suggests three plans to increase process throughput based on the process analysis of K company and evaluates them via a simulation model using a real data collected. The three plans are line balancing by adding machines to the bottleneck process, product group scheduling, and reallocation of the operators in non-bottleneck processes. The evaluation result shows the highest daily throughput increase of 17.3% with an effect of 2.8% reduction of due date violation when the three plans are applied together. Payback period for the mixed application of the three plans is obtained as 1.37 years.
Keywords
Simulation model; Semiconductor package process; Throughput increase; Line balancing; Group scheduling; Case study;
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