• 제목/요약/키워드: Semiconductor Production Line

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레이저를 이용한 LCD 유리 절단 기술

  • 정재용;오대현;유기룡;이천;이우영
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2005년도 춘계 학술대회
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    • pp.219-223
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    • 2005
  • Nowadays laser cutting is the most promising method of cutting FPD(Flat Panel Display) glass in mass-production line. And this method can also be used to cut other brittle materials such as quartz, sapphire, ceramic and semiconductor The concept of this method is shown in picture 1. Laser beam heats glass up to strain point, not to melting point and cooling system chills glass to induce maximun thermal stress in glass surface and then the thermal stress generates micro thermal crack, in other words blind depth of crack, along laser beam and cooling line.

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LCD 모듈 조립라인의 공정 자동화 설계 (A Design for the Automated Process of LCD Module Assembly Line)

  • 송춘삼;김주현;김종형
    • 한국공작기계학회논문집
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    • 제16권5호
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    • pp.162-165
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    • 2007
  • TFT-LCD process has two advantages as compared with the semiconductor-process. It is that cycle time is short and number of the final products are small. But it needs complicated inspection / assembly line to be treated manually and much higher labor costs in the TFT-LCD process. Also, It is necessary to build PICS(Production Information and Control System) which is automated and intelligent. In this paper, an automated process of LCD module assembly line that can increase productivity and reduce the cost of production to strengthen the competitiveness corresponding with global market is planned in comparison with its manual/semi-auto. It is noted that The automated line for COG$\sim$FOG process replacing with the existing facilities had the following effects; the productivity is increased to about 1.5 times and labor cost reduced 85%. In addition, whole assembly line can be short and simple.

반도체 FAB공정의 사이클타임 단축을 위한 병목일정계획 (Bottleneck Scheduling for Cycletime Reduction in Semiconductor Fabrication Line)

  • 이영훈;김태헌
    • 한국경영과학회:학술대회논문집
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    • 한국경영과학회 2001년도 추계학술대회 논문집
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    • pp.298-301
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    • 2001
  • In semiconductor manufacturing, wafer fabrication is the most complicated and important process, which is composed of several hundreds of process steps and several hundreds of machines involved. The productivity of the manufacturing mainly depends on how well they control balance of WIP flow to achieve maximal throughput under short manufacturing cycle time. In this paper mathematical formulation is suggested for the stepper scheduling, in which cycle time reduction and maximal production is achieved.

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불확실한 수율과 수요를 고려한 반도체 생산라인에서의 최적 투입량 결정모형 (A Model for Determining Optimal Input Quantity in a Semiconductor Production Line Considering Yield Randomness and Demand Uncertainty)

  • 박광태;안봉근
    • 한국경영과학회지
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    • 제20권1호
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    • pp.27-34
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    • 1995
  • In this paper, we have developed a model to determine the input quantity to be processed at each stage of a multi-stage production system in which the yield at each stage may be random and may need reworking at this stage. Yield randomness. especially in a semiconductor industry, is a most challenging problem for production control. The demand for flnal product is uncertain. We have extended the model proposed in Park and Kim[9] to consider a multiple number of reworkings which can be done at any stage prior to or tat the stage whose output in bad, depending on the level of the defect.

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시뮬레이션과 AHP/DEA를 이용한 반도체 부품 생산라인 개선안 결정 (Determination of New Layout in a Semiconductor Packaging Substrate Line using Simulation and AHP/DEA)

  • 김동수;박철순;문덕희
    • 산업공학
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    • 제25권2호
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    • pp.264-275
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    • 2012
  • The process of semiconductor(IC Package) manufacturing usually includes lots of complex and sequential processes. Many kinds of equipments are installed with the mixed concept of serial and parallel manufacturing system. The business environments of the semiconductor industry have been changed frequently, because new technologies are developed continuously. It is the main reason of new investment plan and layout consideration. However, it is difficult to change the layout after installation, because the major equipments are expensive and difficult to move. Furthermore, it is usually a multiple-objective problem. Thus, new investment or layout change should be carefully considered when the production environments likewise product mix and production quantity are changed. This paper introduces a simulation case study of a Korean company that produces packaging substrates(especially lead frames) and requires multi-objective decision support. $QUEST^{(R)}$ is used for simulation modelling and AHP(Analytic Hierarchy Process) and DEA(Data Envelopment Analysis) are used for weighting of qualitative performance measures and solving multiple-objective layout problem, respectively.

반도체 FAB 공정에서의 효율적 흐름제어를 위한 시뮬레이션 (Simulation of Efficient Flow Control for FAB of Semiconductor Manufacturing)

  • 한영신;전동훈
    • 한국멀티미디어학회논문지
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    • 제3권4호
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    • pp.407-415
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    • 2000
  • 설비 집약적이며 복잡한 생산 시스템중의 하나인 반도체 FAB 공정은 제품의 흐름시간과 대기시간, 공정 중 재고를 줄이는 것이 흐름제어의 가장 중요한 목표이다. 이에 본 연구에서는 소품종 다랑 생산 시스템에서 발생하는 비경제성을 줄이고 생산성을 향상시키기 위하여 현재 반도체 양산 회사에서 주로 채택하고 있는 In-Line Layout을 분석하고 새로운 제안 방식인 그룹테크놀로지를 이용한 Job Shop 형태의 Stand Alone Layout과 함께 각각의 모델로 구축하고 시뮬레이션 함으로써 일별 생산 계획상의 회수 변화에 따른 각Layout의 특성을 비교, 분석하였다. 이 때 사용한 시뮬레이션 툴은 모델 구축 및 시뮬레이션이 용이하고 범용적인 (이산형 제조 시스템용) ProSys를 사용하였다. 연구 결과로는 일별 생산 계획상의 회수 초기에는 In-Line Layout이 Stand Alone Layout보다 대체로 생산량 측면에서 우세하지만 일별 생산계획상의 회수가 증가된 14회부터는 Stand Alone Layout이 더 우세한 것으로 나타났다

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반도체 Probe 공정에서의 생산 능력 계획 (Capacity Planning and Control of Probe Process in Semiconductor Manufacturing)

  • 정봉주;이영훈
    • 산업공학
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    • 제10권1호
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    • pp.15-22
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    • 1997
  • In semiconductor manufacturing, the probe process between fabrication and assembly process is constrained mostly by the equipment capacity because most products pass through the similar procedures. The probe process is usually performed in a batch mode with relatively short cycle times. The capability of the probe process can be determined by the optimal combination of the equipments and the products. A probe line usually has several types of equipment with different capacity. In this study, the probe line is modeled in terms of capacity to give the efficient planning and control procedure. For the practical usage, the hierarchical capacity planning procedure is used. First, a monthly capacity plan is made to meet the monthly production plan of each product. Secondly, the daily capacity planning is performed by considering the monthly capacity plan and the daily fabrication output. Simple heuristic algorithms for daily capacity planning are developed and some experimental results are shown.

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스마트 설비관리시스템 구축 및 효과분석 (Implementation and Effectiveness of Smart Equipment Engineering System)

  • 심현식
    • 반도체디스플레이기술학회지
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    • 제16권3호
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    • pp.121-126
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    • 2017
  • EES System support to maximize equipment efficiency by providing real-time information of main equipment which has a significant effect on product quality and productivity, and to prevent equipment failure by detecting equipment abnormality in advance. Smart Equipment Engineering System(S-EES) integrates the activities performed at equipment that are the core of production activities and manages them by system so as to maximize the efficiency of equipment and raise the quality level of products to one level. In other words, when the product is put into the equipment, the recipe is downloaded through the RMS, the recipe is set to the optimal condition through R2R(process control), and the system detects and controls the abnormality of the equipment during operation through the FDC function in real time it means. In this way, we are working with the suitable recipe that matches the lot of product, detecting the abnormality of the equipment during operation, preventing the product from being defective, and establishing a system to maximize the efficiency through real-time equipment management. In this study, we review the present status and problems of equipment management in actual production lines, collect the requirements of the manufacturing line for the PCB line, design and develop the system, The measurement model was studied.

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정밀산업(TFT-LCD) 공장 내 노광장치의 대형 세대별 동강성 허용규제치 예측 및 평가에 관한 연구 (A Study on How to Predict and Evaluate the Dynamic Stiffness Criteria of Exposure Equipment in Precision Industrial Factory(TFT-LCD))

  • 백재호;전종균;박상곤
    • 반도체디스플레이기술학회지
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    • 제10권4호
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    • pp.15-20
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    • 2011
  • The lithography system installed inside precision industry's (e.g. TFT-LCD) production factories are increasing in size, thereby increasing its dynamic load along with it. Such condition causes vibration within the area where the system is installed, which then negatively affects the production line to produce defective products. To prevent this type of situation, the facilities should adopt dynamic design that considers the lithography system's dynamic load. This study predicts the maximum value allowed for dynamic stiffness (which is a ratio of vibration response against a single unit of the dynamic load) of the lithography system and explains the result of its application on actual structures inside the facilities.

시뮬레이션 모델을 이용한 K회사 반도체 패키지 공정의 생산량 증가를 위한 연구 (A Study on Throughput Increase in Semiconductor Package Process of K Manufacturing Company Using a Simulation Model)

  • 채종인;박양병
    • 한국시뮬레이션학회논문지
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    • 제19권1호
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    • pp.1-11
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    • 2010
  • K 회사는 국내외 반도체 제조업체의 주문에 의해 반도체 패키지 제품을 생산 공급하는 기업이다. 생산 공정은 Die Sawing, 조립, 테스트로 구성된 기계중심의 조립라인 형태를 따르고 있다. 본 논문은 K 회사의 공정분석을 토대로 패키지 공정의 생산량을 늘리기 위한 3가지 방안을 제안하고, 이들을 실제 자료를 이용한 시뮬레이션 모델을 통해 평가하는 사례연구를 다룬다. 3가지 방안은 병목공정에 기계 추가에 의한 라인균형, 제품의 그룹 스케쥴링, 비병목공정에서 작업자의 재배치이다. 시뮬레이션 평가결과, 3가지 방안을 혼합 적용하는 경우에 2.8%의 납기위반율 감소 효과와 함께 17.3%의 가장 높은 일일 생산량 증가를 보여 주는 것으로 나타났다. 3가지 방안의 혼합 적용하는 경우의 투자회수기간은 1.37년으로 매우 짧게 구해졌다.