• Title/Summary/Keyword: Semiconductor Processing

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Topology Optimization of Reinforcement Pattern for Pressure-Explosion Proof Enclosure Door in Semiconductor Manufacturing Process (위상최적화 기법을 이용한 반도체 공정용 압력방폭형 외함 도어의 보강 패턴 최적화)

  • Yeong Sang Kim;Dong Seok Shin;Euy Sik Jeon
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.2
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    • pp.56-63
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    • 2023
  • This paper presents a method using finite element analysis and topology optimization to address the issue of overdesign in pressure-explosion proof enclosure doors for semiconductor manufacturing processes. The design conducted in this paper focuses on the pattern design of the enclosure door and its fixation components. The process consists of a solid-filled model, a topology optimization model, and a post-processing model. By applying environmental conditions to each model and comparing the maximum displacement, maximum equivalent stress, and weight values, it was confirmed that a reduction of about 13% in weight is achievable.

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Performance Analysis for Accelerating NTRU PQC Algorithm (NTRU PQC 알고리즘 가속을 위한 성능 분석)

  • Kim, Jeehwan;Cho, Myunghyun;Lee, Yongseok;Paek, Yunheung
    • Proceedings of the Korea Information Processing Society Conference
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    • 2021.11a
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    • pp.290-292
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    • 2021
  • 양자 컴퓨터 기술의 발전에 따라 현재 사용되고 있는 암호 알고리즘과 시스템들이 위협받고 있다. 이러한 시대적 흐름에 따라 양자 컴퓨터로도 쉽게 해결할 수 없는 양자내성암호의 개발이 요구되고 있으며, 미국 NIST 에서는 양자내성암호의 표준화를 위한 공모전을 진행하고 있다. 본 논문에서는 공모전 최종 후보 중 하나인 NTRU 알고리즘을 가속화하기 위한 성능 분석을 진행하였다.

Side-Channel Attacks on Homomorphic Encryption and Their Mitigation Methods (동형암호에 대한 부채널 공격과 대응에 관한 연구)

  • Kevin Nam;Youyeon Joo;Seungjin Ha;Yunheung Paek
    • Proceedings of the Korea Information Processing Society Conference
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    • 2023.05a
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    • pp.212-214
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    • 2023
  • 동형암호는 주목받는 차세대 프라이버시 보존 기술이다. 많은 기업들이 이를 활용한 서비스들을 제공하고 있다. 비록 동형암호가 수학적으로 안전성을 인정받았지만, 실행되는 프로그램으로써 동형암호는 부채널공격들에 취약하다는 연구 결과들이 보고되고 있다. 이 논문은 이런 부채널공격들에 대해 본석, 일반화하여 사용 가능한 gadget을 소개하며, 대응기법에 대한 가이드라인을 제안하고 그 효과와 한계에 대해 분석한다.

Present Status and Future Prospect of Quantum Dot Technology (양자점 (Quantum dot) 기술의 현재와 미래)

  • Hong, H.S.;Park, K.S.;Lee, C.G.;Kim, B.S.;Kang, L.S.;Jin, Y.H.
    • Journal of Powder Materials
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    • v.19 no.6
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    • pp.451-457
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    • 2012
  • Nowadays, research and development on quantum dot have been intensively and comprehensively pursued worldwide in proportion to concurrent breakthrough in the field of nanotechnology. At present, quantum dot technology forms the main interdisciplinary basis of energy, biological and photoelectric devices. More specifically, quantum dot semiconductor is quite noteworthy for its sub-micro size and possibility of photonic frequency modulation capability by controlling its size, which has not been possible with conventionally fabricated bulk or thin film devices. This could lead to realization of novel high performance devices. To further understand related background knowledge of semiconductor quantum dot at somewhat extensive level, a review paper is presently drafted to introduce basics of (semiconductor) quantum dot, its properties, applications, and present and future market trend and prospect.

A Study on the Development of Wafer Notch Aligner (노치형 웨이퍼 정렬기 개발에 관한 연구)

  • Na, Won-Shik
    • Journal of Advanced Navigation Technology
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    • v.13 no.3
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    • pp.412-418
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    • 2009
  • This study aims to develop a system that enables 20 to 25 wafers to be automatically aligned at the position of the corresponding serial number and facilitates the checkout of wafer processing by sensing them before and after semiconductor processing. It also suggests compensation algorithm and stepper motor control algorithm that carefully align notches. This study minimizes the rate of occurrence by adopting materials of which the surface has proper coefficient of friction when wafers are rotating and that do not rarely produce particles. This study completed the development of a slip resistance apparatus and carried out performance tests through mathematical verification. This system is expected to improve semiconductor yield due to anti-pollution technology in semiconductor processing and can be selectively applied to a large size wafer over 450mm in the future.

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Semiconductor Behavior of Passive Films Formed on Cr with Various Additive Elements

  • Tsuchiya, Hiroaki;Fujimoto, Shinji;Shibata, Toshio
    • Corrosion Science and Technology
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    • v.2 no.1
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    • pp.7-11
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    • 2003
  • Photoelectrochemical response and electrochemical impedance behavior was investigated for passive film formed on sputter-deposited Cr alloy in $0.1kmol{\cdot}m^{-3}$. Photoelectrochemical action spectrum could be separated into two components, which were considered to be derived from $Cr_2O_3$ ($E_g\sim3.6eV$) and $ Cr(OH)_3 $ ($E_g\sim2.5eV$). The band gap energy, $E_g$, of each component was almost constant for various applied potentials. polarization periods and alloying additives. The photoelectrochemical response showed negative photo current for most potentials in the passive region. Therefore, the photo current apparently exhibited p-typesemiconductor behavior. On the other hand, Mort-Schottky plot of the capacitance showed positive slope, which means that passive film formed on Cr alloy has n-type semiconductor property. These apparently conflicting results are rationally explained assuming that the passive film on Cr alloy formed in the acid solution has n-type semiconductor property with a fairly deep donor level in the band gap and forms an accumulation layer in the most of potential region in the passive state.

Implementation of the FAT32 File System using PLC and CF Memory (PLC와 CF 메모리를 이용한 FAT32 파일시스템 구현)

  • Kim, Myeong Kyun;Yang, Oh;Chung, Won Sup
    • Journal of the Semiconductor & Display Technology
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    • v.11 no.2
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    • pp.85-91
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    • 2012
  • In this paper, the large data processing and suitable FAT32 file system for industrial system using a PLC and CF memory was implemented. Most of PLC can't save the large data in user data memory. So it's required to the external devices of CF memory or NAND flash memory. The CF memory is used in order to save the large data of PLC system. The file system using the CF memory is NTFS, FAT, and FAT32 system to configure in various ways. Typically, the file system which is widely used in industrial data storage has been implemented as modified FAT32. The conventional FAT 32 file system was not possible for multiple writing and high speed data accessing. The proposed file system was implemented by the large data processing module can be handled that the files are copied at the 40 bytes for 1msec speed logging and creating 8 files at the same time. In a sudden power failure, high reliability was obtained that the problem was solved using a power fail monitor and the non-volatile random-access memory (NVSRAM). The implemented large data processing system was applied the modified file system as FAT32 and the good performance and high reliability was showed.

Surface analysis using Raman spectroscopy during semiconductor processing (라만 분광법을 이용한 반도체 공정 중 표면 분석)

  • Tae Min Choi;JinUk Yoo;Eun Su Jung;Chae Yeon Lee;Hwa Rim Lee;Dong Hyun Kim;Sung Gyu Pyo
    • Journal of the Korean institute of surface engineering
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    • v.57 no.2
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    • pp.71-85
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    • 2024
  • This article provides an overview of Raman spectroscopy and its practical applications for surface analysis of semiconductor processes including real-time monitoring. Raman spectroscopy is a technique that uses the inelastic scattering of light to provide information on molecular structure and vibrations. Since its inception in 1928, Raman spectroscopy has undergone continuous development, and with the advent of SERS(Surface Enhanced Raman Spectroscopy), TERS(Tip Enhanced Raman Spectroscopy), and confocal Raman spectroscopy, it has proven to be highly advantageous in nano-scale analysis due to its high resolution, high sensitivity, and non-destructive nature. In the field of semiconductor processing, Raman spectroscopy is particularly useful for substrate stress and interface characterization, quality analysis of thin films, elucidation of etching process mechanisms, and detection of residues.

Time-Domain Analog Signal Processing Techniques

  • Kang, Jin-Gyu;Kim, Kyungmin;Yoo, Changsik
    • Journal of Semiconductor Engineering
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    • v.1 no.2
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    • pp.64-73
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    • 2020
  • As CMOS technology scales down, the design of analog signal processing circuit becomes far more difficult because of steadily decreasing supply voltage and smaller intrinsic gain of transistors. With sub-1V supply voltage, the conventional analog signal processing relying on high-gain amplifiers is not an effective solution and different approach has to be sought. One of the promising approaches is "time-domain analog signal processing" which exploits the improving switching speed of transistors in a scaled CMOS technology. In this paper, various time-domain analog signal processing techniques are explained with some experimental results.