• Transactions of the Korean Society of Machine Tool Engineers
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• v.12 no.2
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• pp.65-70
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• 2003

In this study, researchers developed the estimative algorithm for artificial defect in semiconductor packages and performed it by pattern recognition technology. For this purpose, the estimative algorithm was included that researchers made software with MATLAB. The software consists of some procedures including ultrasonic image acquisition, equalization filtering, Self-Organizing Map and Backpropagation Neural Network. Self-organizing Map and Backpropagation Neural Network are belong to methods of Neural Networks. And the pattern recognition technology has applied to classify three kinds of detective patterns in semiconductor packages : Crack, Delamination and Normal. According to the results, we were confirmed that estimative algerian was provided the recognition rates of 75.7% (for Crack) and 83.4% (for Delamination) and 87.2 % (for Normal).

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.345-350
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• 2002

In this study, researchers classifying the artificial flaws in semiconductor packages are performed by pattern recognition technology. For this purposes, image pattern recognition package including the user made software was developed and total procedure including ultrasonic image acquisition, equalization filtration, binary process, edge detection and classifier design is treated by Backpropagation Neural Network. Specially, it is compared with various weights of Backpropagation Neural Network and it is compared with threshold level of edge detection in preprocessing method fur entrance into Multi-Layer Perceptron(Backpropagation Neural network). Also, the pattern recognition techniques is applied to the classification problem of defects in semiconductor packages as normal, crack, delamination. According to this results, it is possible to acquire the recognition rate of 100% for Backpropagation Neural Network.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.721-726
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• 2005

In this study, researchers classifying the artificial flaws in semiconductor. packages are performed by pattern recognition technology. For this purposes, image pattern recognition package including the user made software was developed and total procedure including ultrasonic image acquisition, equalization filtration, binary process, edge detection and classifier design is treated by Backpropagation Neural Network. Specially, it is compared with various weights of Backpropagation Neural Network and it is compared with threshold level of edge detection in preprocessing method for entrance into Multi-Layer Perceptron(Backpropagation Neural network). Also, the pattern recognition techniques is applied to the classification problem of defects in semiconductor packages as normal, crack, delamination. According to this results, it is possible to acquire the recognition rate of 100% for Backpropagation Neural Network.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2005.05a
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• pp.91-96
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• 2005

In this study, researchers developed the estimative algorithm for artificial defects in semiconductor packages and performed it by pattern recognition technology. For this purpose, the estimative algorithm was included that researchers made software with MATLAB. The software consists of some procedures including ultrasonic image acquisition, equalization filtering, Self-Organizing Map and Backpropagation Neural Network. Self-Organizing Map and Backpropagation Neural Network are belong to methods of Neural Networks. And the pattern recognition technology has applied to classify three kinds of detective patterns in semiconductor packages: Crack, Delamination and Normal. According to the results, we were confirmed that estimative algorithm was provided the recognition rates of $75.7\%$ (for Crack) and $83_4\%$ (for Delamination) and $87.2\%$ (for Normal).

• International Journal of Precision Engineering and Manufacturing
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• v.5 no.3
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• pp.11-18
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• 2004

In this paper, the classification of artificial defects in semiconductor packages is studied by using pattern recognition technology. For this purpose, the pattern recognition algorithm includes the user made MATLAB code. And preprocess is made of the image process and self-organizing map, which is the input of the back-propagation neural network and the dimensionality reduction method, The image process steps are data acquisition, equalization, binary and edge detection. Image process and self-organizing map are compared to the preprocess method. Also the pattern recognition technology is applied to classify two kinds of defects in semiconductor packages: cracks and delaminations.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2002.10a
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• pp.80-84
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• 2002

In this study, researchers developed the est algorithm for artificial defects in the semic packages and performed to it by pattern recogn technology. For this purpose, this algorithm was I that researcher made software with matlab. The so consists of some procedures including ultrasonic acquistion, equalization filtering, self-organizing backpropagation neural network. self-organizing ma backpropagation neural network are belong to metho neural networks. And the pattern recognition tech has applied to classify three kinds of detective pa semiconductor packages. that is, crack, delaminat normal. According to the results, it was found estimative algorithm was provided the recognition r 75.7%( for crack) and 83.4%( for delamination) 87.2 % ( for normal).

• Journal of the Semiconductor & Display Technology
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• v.10 no.1
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• pp.17-22
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• 2011

LEDs(Light Emitting Diodes) are becoming widely used and increasingly in demand. Quality inspection of the LEDs has become more important. Two-dimensional inspection systems are limited in inspection capability, so threedimensional(3-D) inspection systems are needed. In this paper, a cost-effective and simple 3-D measurement system of LED packages using phase measuring profilometry(PMP) is proposed. The proposed system uses a pico projector to project sinusoidal fringe patterns and to shift phases instead of piezocrystal. It was evaluated using extremely accurate gauge blocks, yielding excellent repeatability of about 12 um(3-sigma). 3-D measurements of various LED packages were performed to demonstrate the applicability and efficiency of the proposed system.

• Journal of the Semiconductor & Display Technology
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• v.6 no.1 s.18
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• pp.17-22
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• 2007

Recent new packages such as MCP(Multi-Chip Package), QDP(Quadratic Die Package) and DDP(Dual Die Package) have stack type configuration. This kind of multi-layer package is thicker than single layer package. So there is need for the low height looping technology in wirebonder to make these packages thinner. There is stiff zone above ball in wirebonder wire which is called HAZ(Heat Affect Zone). When making low height loop (below $80\;{\mu}m$) with traditional forward loop, stiff wire in HAZ(Heat Affected Zone) above ball is bended and weakened. So the traditional forward looping method cannot be applied to low height loop. SSB(stand-off stitch) wire bonding method was applied to many packages which require very low loops. The drawback of SSB method is making frequent errors at making ball, neck damage above ball on lead and the weakness of ball bonding on lead. The alternative looping method is BNL(ball neckless) looping technology which is already applied to some package(DDP, QDP). The advantage of this method is faster in bonding process and making little errors in wire bonding compared with SSB method. This paper presents the result of BNL looping technology applied in assembly house and several issues related to low loop height consistence and BNL zone weakness.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.35-41
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• 2011

Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.

• Journal of the Semiconductor & Display Technology
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• v.15 no.4
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• pp.1-9
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• 2016

The warpage on mobile phone camera packages occurs due to the CTE(Coefficient of Thermal Expansion) mismatch between a thin silicon die and a substrate. The warpage in the optical instruments such as camera module has an effect on the field curvature, which is one of the factors degrading the optical performance and the product yield. In this paper, we studied the effect of die bonding epoxy on the package and optical performance of mobile phone camera packages. We calculated the warpages of camera module packages by using a finite element analysis, and their shapes were in good agreement showing parabolic curvature. We also measured the warpages and through-focus MTF of camera module specimens with experiments. The warpage was improved on an epoxy with low elastic modulus at both finite element analysis and experiment results, and the MTF performance increased accordingly. The results show that die bonding epoxy affects the warpage generated on the image sensor during the packaging process, and this warpage eventually affects the optical performance associated with the field curvature.