• Title/Summary/Keyword: Semiconductor FAB

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Possibility of Spreading Infectious Diseases by Droplets Generated from Semiconductor Fabrication Process (반도체 FAB의 비말에 의한 감염병 전파 가능성 연구)

  • Oh, Kun-Hwan;Kim, Ki-Youn
    • Journal of Korean Society of Occupational and Environmental Hygiene
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    • v.32 no.2
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    • pp.111-115
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    • 2022
  • Objectives: The purpose of this study is to verify whether droplet-induced propagation, the main route of infectious diseases such as COVID-19, can occur in semiconductor FAB (Fabrication), based on research results on general droplet propagation. Methods: Through data surveys droplet propagation was modeled through simulation and experimental case analysis according to general (without mask) and mask-wearing conditions, and the risk of droplet propagation was inferred by reflecting semiconductor FAB operation conditions (air current, air conditioning system, humidity, filter conditions). Results: Based on the results investigated to predict the possibility of spreading infectious diseases in semiconductor FAB, the total amount of droplet propagation (concentration), propagation distance, and virus life in FAB were inferred by reflecting the management parameter of semiconductor FAB. Conclusions: The total amount(concentration) of droplet propagation in the semiconductor fab is most affected by the presence or absence of wearing a mask and the line air dilution rate has some influence. when worn it spreads within 0.35~1m, and since the humidity is constant the virus can survive in the air for up to 3 hours. as a result the semiconductor fab is judged to be and effective space to block virus propagation due to the special environmental condition of a clean room.

A Milestone Generation Algorithm for Efficient Control of FAB Process in a Semiconductor Factory (반도체 FAB 공정의 효율적인 통제를 위한 생산 기준점 산출 알고리듬)

  • Baek, Jong-Kwan;Baek, Jun-Geol;Kim, Sung-Shick
    • Journal of Korean Institute of Industrial Engineers
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    • v.28 no.4
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    • pp.415-424
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    • 2002
  • Semiconductor manufacturing has been emerged as a highly competitive but profitable business. Accordingly it becomes very important for semiconductor manufacturing companies to meet customer demands at the right time, in order to keep the leading edge in the world market. However, due-date oriented production is very difficult task because of the complex job flows with highly resource conflicts in fabrication shop called FAB. Due to its cyclic manufacturing feature of products, to be completed, a semiconductor product is processed repeatedly as many times as the number of the product manufacturing cycles in FAB, and FAB processes of individual manufacturing cycles are composed with similar but not identical unit processes. In this paper, we propose a production scheduling and control scheme that is designed specifically for semiconductor scheduling environment (FAB). The proposed scheme consists of three modules: simulation module, cycle due-date estimation module, and dispatching module. The fundamental idea of the scheduler is to introduce the due-date for each cycle of job, with which the complex job flows in FAB can be controlled through a simple scheduling rule such as the minimum slack rule, such that the customer due-dates are maximally satisfied. Through detailed simulation, the performance of a cycle due-date based scheduler has been verified.

A Study on Solving the WSix Peeling Issue at MDDR DRAM (MDDR(Mobile Double Data Rate) DRAM의 WSix Peeling 불량 해결 연구)

  • Chae, Han-Yong;Lee, Sung-Young;Park, Tae-Hoon;Lee, Hyun-Sung;Lee, Kwang-Hee;Seo, Ju-Won;Choi, Kyue-Sang
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.481-482
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    • 2008
  • In this paper, the advanced process has been presented to remove the WSix peeling that was made in sub 100nm DRAM SRCAT(Sphere-shaped-Recess-Ch annel-Array Transistor). The source of WSix peeling was proved to be the groove of gate poly film. We have completely solved the problems to adopt the gate-poly CMP (Chemical Mechanical Polishing) process.

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Development of Quantitative Exposure Index in Semiconductor Fabrication Work (반도체 FAB근무에 대한 정량적 노출지표 개발)

  • Shin, Kyu-Sik;Kim, Taehun;Jung, Hyun Hee;Cho, Soo-Hun;Lee, Kyoungho
    • Journal of Korean Society of Occupational and Environmental Hygiene
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    • v.27 no.3
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    • pp.187-192
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    • 2017
  • Objectives: It is difficult to identify exposure factors in the semiconductor industry due to low exposure levels to hazardous substances and because various processes take place in fabrication (FAB). Furthermore, a single worker often experiences a variety of job histories, so it is difficult to classify similar exposure groups (SEG) in the semiconductor industry. Therefore, we intend to develop a new exposure index, the period of working in FAB, that is applicable to the semiconductor industry. Methods: First, in specifying the classification of jobs, we clearly distinguished whether they were FAB workers or non-FAB workers. We checked FAB working hours per week through questionnaires administered to FAB workers. We derived an exposure index called FAB-Year that can represent the period of working in FAB. FAB-Year is an index that can quantitatively indicate the period of working in FAB, and one FAB-Year is defined as working in FAB for 40 hours per week for one year. Results: A total of 8,453 persons were surveyed, and male engineers and female operators occupied 90% of the total. The average total years of service of the subjects was 9.7 years, and the average FAB-Year value was 6.8. This means that the FAB-working ratio occupies 70% of total years of service. The average FAB-Year value for female operators was 8.4, for male facility engineers it was 7.7, and for male process engineers it was 3.5. A FAB-Year standardization value according to personal information (gender, job group, entry year, retirement year) for the survey subjects can be calculated, and standardized estimation values can be applied to workers who are not participating in the survey, such as retirees and workers on a leave of absence (LOA). Conclusions: This study suggests an alternative method for overcoming the limitations on epidemiological study of the semiconductor industry where it is difficult to classify exposure groups by developing a new exposure index called FAB-Year. Since FAB-Year is a quantitative index, we expect that various approaches will be possible in future epidemiological studies.

The Simulation and Forecast Model for Human Resources of Semiconductor Wafer Fab Operation

  • Tzeng, Gwo-Hshiung;Chang, Chun-Yen;Lo, Mei-Chen
    • Industrial Engineering and Management Systems
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    • v.4 no.1
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    • pp.47-53
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    • 2005
  • The efficiency of fabrication (fab) operation is one of the key factors in order for a semiconductor manufacturing company to stay competitive. Optimization of manpower and forecasting manpower needs in a modern fab is an essential part of the future strategic planing and a very important to the operational efficiency. As the semiconductor manufacturing technology has entered the 8-inch wafer era, the complexity of fab operation increases with the increase of wafer size. The wafer handling method has evolved from manual mode in 6-inch wafer fab to semi-automated or fully automated factory in 8-inch and 12-inch wafer fab. The distribution of manpower requirement in each specialty varied as the trend of fab operation goes for downsizing manpower with automation and outsourcing maintenance work. This paper is to study the specialty distribution of manpower from the requirement in a typical 6-inch, 8-inch to 12-inch wafer fab. The human resource planning in today’s fab operation shall consider many factors, which include the stability of technical talents. This empirical study mainly focuses on the human resource planning, the manpower distribution of specialty structure and the forecast model of internal demand/supply in current semiconductor manufacturing company. Considering the market fluctuation with the demand of varied products and the advance in process technology, the study is to design a headcount forecast model based on current manpower planning for direct labour (DL) and indirect labour (IDL) in Taiwan’s fab. The model can be used to forecast the future manpower requirement on each specialty for the strategic planning of human resource to serve the development of the industry.

Direct Carrier System Based 300mm FAB Line Simulation (Direct 반송방식에 기반을 둔 300mm FAB Line 시뮬레이션)

  • Lee, Hong-Soon;Han, Young-Shin;Lee, Chil-Gee
    • Journal of the Korea Society for Simulation
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    • v.15 no.2
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    • pp.51-57
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    • 2006
  • Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.

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Review for Retrospective Exposure Assessment Methods Used in Epidemiologic Cancer Risk Studies of Semiconductor Workers: Limitations and Recommendations

  • Park, Donguk
    • Safety and Health at Work
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    • v.9 no.3
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    • pp.249-256
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    • 2018
  • This article aims to provide a systematic review of the exposure assessment methods used to assign wafer fabrication (fab) workers in epidemiologic cohort studies of mortality from all causes and various cancers. Epidemiologic and exposure-assessment studies of silicon wafer fab operations in the semiconductor industry were collected through an extensive literature review of articles reported until 2017. The studies found various outcomes possibly linked to fab operations, but a clear association with the chemicals in the process was not found, possibly because of exposure assessment methodology. No study used a tiered assessment approach to identify similar exposure groups that incorporated manufacturing era, facility, fab environment, operation, job and level of exposure to individual hazardous agents. Further epidemiologic studies of fab workers are warranted with more refined exposure assessment methods incorporating both operation and job title and hazardous agents to examine the associations with cancer risk or mortality.

The Operational Optimization of Semiconductor Research and Development Fabs by FAB-wide Scheduling (FAB-Wide 스케줄링을 통한 반도체 연구라인의 운용 최적화)

  • Kim, Young-Ho;Lee, Jee-Hyong;Sun, Dong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.4
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    • pp.692-699
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    • 2008
  • Semiconductor research and development(R&D) fabs are very different than production fabs in many ways such as the scales of production, job priority, production methods, and performance measures. Efficient operations of R&D fabs are very important to the development of new product, process stability, high yield, and ultimately company competitiveness. This paper proposes the fab-wide scheduling method for operational optimization of the R&D fabs. Most scheduling systems of semiconductor fabs have only focused on maximizing throughput of each separated areas without considering WIP(works in process) flows of entire fab. In this paper, we proposes the a fab-wide scheduling system which schedules all lots to entire fab equipment at once. We develop the MIP(mixed integer programing) model which allocates the lots to production equipment considering many constraints of all processes and the CP(constraint programming) model which determines the sequences of the lots in the production equipment. The proposed FAB-wide scheduling model is applied to the newly constructed R&D fab. As a result, we have accomplished the system based automated job reservation, decrease of the hot lot delay, increase of the queue time satisfaction, the high throughput by maximizing the batch sizes, decrease of the WIP TAT(Turn Around Time).