• Journal of the Korea Society of Computer and Information
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• v.25 no.1
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• pp.37-43
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• 2020

In this paper, we propose an efficient AB² multiplication algorithm using SPB(shifted polynomial basis) over finite fields. Using the feature of the SPB, we split the equation for AB² multiplication into two parts. The two partitioned equations are executable at the same time, and we derive an algorithm that processes them in parallel. Then we propose an efficient semi-systolic AB² multiplier based on the proposed algorithm. The proposed multiplier has less area-time (AT) complexity than related multipliers. In detail, the proposed AB² multiplier saves about 94%, 87%, 86% and 83% of the AT complexity of the multipliers of Wei, Wang-Guo, Kim-Lee, Choi-Lee, respectively. Therefore, the proposed multiplier is suitable for VLSI implementation and can be easily adopted as the basic building block for various applications.

• Journal of the Korea Society of Computer and Information
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• v.28 no.2
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• pp.69-75
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• 2023

Finite field arithmetic operations play an important role in a variety of applications, including modern cryptography and error correction codes. In this paper, we propose an efficient multiplication algorithm over finite fields using the Montgomery multiplication algorithm. Existing multipliers can be implemented using AND and XOR gates, but in order to reduce time and space complexity, we propose an algorithm using NAND and NOR gates. Also, based on the proposed algorithm, an efficient semi-systolic finite field multiplier with low space and low latency is proposed. The proposed multiplier has a lower area-time complexity than the existing multipliers. Compared to existing structures, the proposed multiplier over finite fields reduces space-time complexity by about 71%, 66%, and 33% compared to the multipliers of Chiou et al., Huang et al., and Kim-Jeon. As a result, our multiplier is proper for VLSI and can be successfully implemented as an essential module for various applications.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.5
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• pp.979-984
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• 2015

In this paper, we proposed a Semi-Systolic multiplier of $GF(2^n)$ with Type II optimal Normal Basis. Comparing the complexity of the proposed multiplier with Chiou's multiplier proposed in 2012, it is saved $2n^2+44n+26$ in total transistor numbers and decrease 4 clocks in time delay. This means that, for $GF(2^{333})$ of the field recommended by NIST for ECDSA, the space complexity is 6.4% less and the time complexity of the 2% decrease. In addition, this structure has an advantage as applied to Chiou's method of concurrent error detection and correction in multiplication of $GF(2^n)$.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.2
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• pp.41-46
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• 2013

Finite field multipliers are the basic building blocks in many applications such as error-control coding, cryptography and digital signal processing. Recently, many semi-systolic architectures have been proposed for multiplications over finite fields. Also, Montgomery multiplication algorithm is well known as an efficient arithmetic algorithm. In this paper, we induce an efficient multiplication algorithm and propose an efficient semi-systolic Montgomery multiplier based on polynomial basis. We select an ideal Montgomery factor which is suitable for parallel computation, so our architecture is divided into two parts which can be computed simultaneously. In analysis, our architecture reduces 30%~50% of time complexity compared to typical architectures.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.2
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• pp.45-52
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• 2002

In this contributions, we propose a new MSB(most significant bit) algorithm based on AOP(All One Polynomial) and two parallel semi-systolic architectures to computes $AB^2$over finite field $GF(2^m)$. The proposed architectures are based on standard basis and use the property of irreducible AOP(All One Polynomial) which is all coefficients of 1. The proposed parallel semi-systolic architecture(PSM) has the critical path of $D_{AND2^+}D_{XOR2}$ per cell and the latency of m+1. The modified parallel semi-systolic architecture(WPSM) has the critical path of $D_{XOR2}$ per cell and has the same latency with PSM. The proposed two architectures, PSM and MPSM, have a low latency and a small hardware complexity compared to the previous architectures. They can be used as a basic architecture for exponentiation, division, and inversion. Since the proposed architectures have regularity, modularity and concurrency, they are suitable for VLSI implementation. They can be used as a basic architecture for algorithms, such as the Diffie-Hellman key exchange scheme, the Digital Signature Algorithm(DSA), and the ElGamal encryption scheme which are needed exponentiation operation. The application of the algorithms can be used cryptosystem implementation based on elliptic curve.

• Journal of Korea Society of Digital Industry and Information Management
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• v.18 no.1
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• pp.1-9
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• 2022

Galois field arithmetic is important in error correcting codes and public-key cryptography schemes. Hardware realization of these schemes requires an efficient implementation of Galois field arithmetic operations. Multiplication is the main finite field operation and designing efficient multiplier can clearly affect the performance of compute-intensive applications. Diverse algorithms and hardware architectures are presented in the literature for hardware realization of Galois field multiplication to acquire a reduction in time and area. This paper presents a low complexity semi-systolic multiplier to facilitate parallel processing by partitioning Montgomery modular multiplication (MMM) into two independent and identical units and two-level systolic computation scheme. Analytical results indicate that the proposed multiplier achieves lower area-time (AT) complexity compared to related multipliers. Moreover, the proposed method has regularity, concurrency, and modularity, and thus is well suited for VLSI implementation. It can be applied as a core circuit for multiplication and division/exponentiation.

• Journal of Korea Society of Industrial Information Systems
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• v.9 no.4
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• pp.41-46
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• 2004

This paper presents a new semi- systolic architecture for $AB^2$ operation. First of all the previous architecture proposed by Lee et al. is analysed and then we present a new algorithm and it's architecture for $AB^2$ operation based on AOP (all one polynomial) to solve the shortcomings in the architecture. Proposed architecture has an efficient configuration than other previous architectures. It is useful for implementing the exponentiation architecture, which is the core operation in public-key cryptosystems.

• Journal of the Korea Society of Computer and Information
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• v.25 no.1
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• pp.13-19
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• 2020

In this paper, we propose a multiplexer based scheme that performs modular AB² multiplication using redundant basis over finite field. Then we propose an efficient multiplexer based semi-systolic AB² multiplier using proposed scheme. We derive a method that allows the multiplexers to perform the operations in the cell of the modular AB² multiplier. The cell of the multiplier is implemented using multiplexers to reduce cell latency. As compared to the existing related structures, the proposed AB² multiplier saves about 80.9%, 61.8%, 61.8%, and 9.5% AT complexity of the multipliers of Liu et al., Lee et al., Ting et al., and Kim-Kim, respectively. Therefore, the proposed multiplier is well suited for VLSI implementation and can be easily applied to various applications.

• Journal of Korea Society of Digital Industry and Information Management
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• v.16 no.2
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• pp.1-9
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• 2020

Many cryptographic and error control coding algorithms rely on finite field GF(2m) arithmetic. Hardware implementation of these algorithms needs an efficient realization of finite field arithmetic operations. Finite field multiplication is complicated among the basic operations, and it is employed in field exponentiation and division operations. Various algorithms and architectures are proposed in the literature for hardware implementation of finite field multiplication to achieve a reduction in area and delay. In this paper, a low area and delay efficient semi-systolic multiplier over finite fields GF(2m) using the modified Montgomery modular multiplication (MMM) is presented. The least significant bit (LSB)-first multiplication and two-level parallel computing scheme are considered to improve the cell delay, latency, and area-time (AT) complexity. The proposed method has the features of regularity, modularity, and unidirectional data flow and offers a considerable improvement in AT complexity compared with related multipliers. The proposed multiplier can be used as a kernel circuit for exponentiation/division and multiplication.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.6
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• pp.592-602
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• 2020

This study examined the contribution of the risk factors that cause cardiovascular disease in Koreans. The subjects were 20,012 adults aged 30~74 years who were enrolled from the 2005~2013 Korean National Health and Nutrition Examination Survey, had filled the risk factors data, and had no cardiovascular disease history. Data analysis was conducted using SAS 9.3, and a weighted composite sample design analysis was performed. The contribution was obtained by applying a squared semi-partial correlation. As a result, they were higher in the order of age (63.9%), smoking (17.3%), systolic blood pressure (7.9%), diabetes (6.9%), antihypertensive medication use (3.0%), and BMI (0.9%) in men. In women, the contributions were in the order of age (54.1%), systolic blood pressure (23.5%), diabetes (13.6%), antihypertensive medication use (5.1%), smoking (3.1%), and BMI (0.6%%). According to age bracket analysis, smoking (51.8~33.7%) was the biggest risk factor, followed in order by age (26.6%) in their 30s and systolic blood pressure (17.3~21.0%) in those older than 40 years in men. In women, the systolic blood pressure (56.2~40.5%) was the main contributor to the risk factors, followed by age (24.0%) in their 30s and diabetes (13.6~32.6%) in those older than 40 years. The contribution of the income level was similar. Therefore, to prevent cardiovascular disease, various programs that reflect the contributions of the risk factors should be developed. Moreover, it is recommended to use the results shown in this study as basic data.