• 제목/요약/키워드: Self-annealing

검색결과 143건 처리시간 0.026초

DRAM 집적공정 응용을 위한 전기도금법 증착 구리 박막의 자기 열처리 특성 연구 (A Study on the Self-annealing Characteristics of Electroplated Copper Thin Film for DRAM Integrated Process)

  • 최득성;정승현
    • 마이크로전자및패키징학회지
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    • 제25권3호
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    • pp.61-66
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    • 2018
  • 본 연구에서는 DRAM 제조 집적공정의 금속배선으로 사용하는 구리의 자기 열처리(self-annealing) 후 박막 특성 변화에 대한 연구를 진행하였다. 구리를 증착하고 상온에서 시간이 경과하면 구리가 성장하여 결정체 크기 변화가 생기는데 이를 자기 열처리라고 부른다. 구리 금속의 증착은 전기 도금법(electroplating)을 사용하였다. 구리 도금액으로 유기 첨가물이 다른 두 가지 시료인 기준 도금액과 평가 도금액 두 용액에 대해 평가 하였다. 자기 열처리 시간이 경과함에 따라 시간에 대해 면 저항 값의 변화가 없는 영역과 이후 급격하게 떨어지는 구간으로 나누어지고 최종적으로 포화면 저항 값을 보인다. 최종적인 면 저항 값은 초기 값 대비 20% 개선 효과를 보인다. 평가 전해액의 자기 열처리 효과가 기준 용액 대비 더 빠른 시간 안에 이루어졌는데 이는 유기 첨가물의 차이 때문이다. 개선의 효과 분석으로 TEM 장비를 이용하여 결정체 변화를 관찰하였고 자기 열처리 공정에 의해 효과적인 결정체 성장이 이루어졌음을 발견했다. 또한 단면 TEM 측정 결과 자기 열처리 된 시료는 전류 방향으로의 결정체 경계면 숫자가 줄어드는 bamboo 구조를 보인다. 열적 열하 특성(thermal excursion characteristics) 측정 결과 고온 열처리 대비 자기 열처리 시료가 hillock 특성이 보이지 않고 이는 박막의 신뢰성 특성을 향상 시킨다. Electron backscattered diffraction (EBSD) 측정 결과 결정체가 $2{\mu}m$까지 성장한 결정체를 관찰하였고 스트레스에 의한 void를 억제하는데 유리한 (100) 면 비중이 증가하는 방향으로 결정체 성장이 이루어짐을 알 수 있다.

Si 기판 위에 형성된 InAs 양자점의 열처리에 의한 표면 상태의 변화 (Temperature-dependent Morphology of Self-assembled InAs Quantum Dots Grown on Si Substrates)

  • 유충현
    • 한국전기전자재료학회논문지
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    • 제20권10호
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    • pp.864-868
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    • 2007
  • Effect of high-temperature annealing on morphology of fully coherent self-assembled InAs quantum dots' grown on Si (100) substrates at $450^{\circ}C$ by atmospheric pressure metalorganic chemical vapor deposition(APMOCVD) was investigated by atomic force microscopy(AFM). When the dots were annealed at 500 - 600$^{\circ}C$ for 15 sec - 60 min, there was no appreciable change in the dot density but the heights of the dots increased along with the reduction in the diameters. In segregation from the InAs quantum dots and/or from the 2-dimensional InAs wetting layer which was not transformed into quantum dots looked responsible for this change in the dot size. However the change rates remained almost same regardless of annealing time and temperature, which may indicate that the morphological change due to thermal annealing is done instantly when the dots are exposed to high temperature annealing.

FDTS와 OTS SAM의 어닐링 온도에 따른 트라이볼로지 특성 (Tribological Characteristics of FDTS & OTS SAM according to Annealing Temperature)

  • 양지철;김대은
    • 한국정밀공학회지
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    • 제20권1호
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    • pp.240-247
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    • 2003
  • The tribological characteristics of FDTS (1H, 1H, 2H, 2H-Perflurodecyltrichlorosilane) SAM (self-assembled monolayer) and OTS (octadecyltrichlorosilane) SAM treated by high temperature annealing have been investigated from the viewpoint of stiction, adhesion and friction in micro/nano scale. From the experimental results, it was found that OTS SAM gets destroyed at 20$0^{\circ}C$ and stiction, adhesion and friction coefficient increased, but FDTS SAM was stable up to 40$0^{\circ}C$. Also, it was found that the friction coefficient of normal OTS SAM below 20$0^{\circ}C$ is lower than that of FDTS SAM in micro/nano scale, but stiction and adhesion is vice versa. This work shows the importance of surface group of self-assembled monolayer in dictating the tribological characteristics and thermal stability.

자기정열 방식을 이용한 X-cut LiNbO$_3$ 광 변조기 제작과 특성 (Fabrication and characterization of X-cut LiNbO$_3$optical modulator using self-aligned method)

  • 강기성;채기병;소대화
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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    • pp.54-57
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    • 1992
  • An electro-optical single modulator is fabricated in X-cut LiNbO$_3$by the annealed proton exchange and self-aligned method. First, the effect of annealing is characterized by examining single optical modulator. It is found that by controlling the annealing time, the single optical modulator can be made widely variable. The on-off state of modulator is performed by annealing process and self-aligned electrodes are used in fabricating the single modulator. The optical single modulator has very good figures of merits : the measured on-off switching voltage of about 2.7V.

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The Characterization of Mn Based Self-forming Barriers on low-k Samples with or without UV Curing Treatment

  • 박재형;한동석;강민수;박종완
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.352.2-352.2
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    • 2014
  • In this present work, we report a Cu-Mn alloy as a materials for the self-forming barrier process. And we investigated diffusion barrier properties of self-formed layer on low-k dielectrics with or without UV curing treatment. Cu alloy films were directly deposited onto low-k dielectrics by co-sputtering, followed by annealing at various temperatures. X-ray diffraction revealed Cu (111), Cu (200) and Cu (220) peaks for both of Cu alloys. The self-formed layers were investigated by transmission electron microscopy. In order to compare barrier properties between Mn-based interlayer interlayer, thermal stability was measured with various low-k dielectrics. X-ray photoelectron spectroscopy analysis showed that chemical compositions of self-formed layer. The compositions of the Mn based self-formed barriers after annealing were determined by the C concentration in the dielectric layers.

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Preparation of Gold Nanoisland Arrays from Layer-by-Layer Assembled Nanoparticle Multilayer Films

  • Choi, Hyung-Y.;Guerrero, Michael S.;Aquino, Michael;Kwon, Chu-Hee;Shon, Young-Seok
    • Bulletin of the Korean Chemical Society
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    • 제31권2호
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    • pp.291-297
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    • 2010
  • This article introduces a facile nanoparticle self-assembly/annealing method for the preparation of nanoisland films. First, nanoparticle-polymer multilayer films are prepared with layer-by-layer assembly. Nanoparticle multilayer films are then annealed at $~500^{\circ}C$ in air to evaporate organic matters from the films. During the annealing process, the nanoparticles on the solid surface undergo nucleation and coalescence, resulting in the formation of nanostructured gold island arrays. By controlling the overall thickness (number of layers) of nanoparticle multilayer films, nanoisland films with various island density and different average sizes are obtained. The surface property of gold nanoisland films is further controlled by the self-assembly of alkanethiols, which results in an increased surface hydrophobicity of the films. The structure and characteristics of these nanoisland film arrays are found to be quite comparable to those of nanoisland films prepared by vacuum evaporation method. However, this self-assembly/annealing protocol is simple and requires only common laboratory supplies and equipment for the entire preparation process.

Nanosheet FETs에서의 효과적인 전열어닐링 수행을 위한 기계적 안정성에 대한 연구 (Investigation of Mechanical Stability of Nanosheet FETs During Electro-Thermal Annealing)

  • 왕동현;박준영
    • 한국전기전자재료학회논문지
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    • 제35권1호
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    • pp.50-57
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    • 2022
  • Reliability of CMOS has been severed under aggressive device scaling. Conventional technologies such as lightly doped drain (LDD) and forming gas annealing (FGA) have been applied for better device reliability, but further advances are modest. Alternatively, electro-thermal annealing (ETA) which utilizes Joule heat produced by electrodes in a MOSFET, has been newly introduced for gate dielectric curing. However, concerns about mechanical stability during the electro-thermal annealing, have not been discussed, yet. In this context, this paper demonstrates the mechanical stability of nanosheet FET during the electro-thermal annealing. The effect of mechanical stresses during the electro-thermal annealing was investigated with respect to device design parameters.

Self diffusion of cation in yttria stabilized zirconia single crystal

  • Cheong, Deock-Soo
    • 한국결정성장학회지
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    • 제19권5호
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    • pp.237-241
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    • 2009
  • Dislocation dipoles were formed in the early stage of deformation of Y-CSZ single crystal at high temperatures. And the dipoles were pinched off to break into dipoles loops by dislocation climb. Dislocation loop annealing was peformed in Y-CSZ single crystal to evaluate the diffusivity of cation which was the rate-controlling ion.

The Characterization of V Based Self-Forming Barriers on Low-k Samples with or Without UV Curing Treatment

  • 박재형;한동석;강유진;신소라;박종완
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.214.2-214.2
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    • 2013
  • Device performance for the 45 and 32 nm node CMOS technology requires the integration of ultralow-k materials. To lower the dielectric constant for PECVD and spin-on materials, partial replacement of the solid network with air (k=1.01) appears to be more intuitive and direct option. This can be achieved introducting of second "labile" phase during depositoin that is removed during a subsequent UV curing and annealing step. Besides, with shrinking line dimensions the resistivity of barrier films cannot meet the International Technology Roadmap for Semiconductors (ITRS) requirements. To solve this issue self-forming diffusion barriers have drawn attention for great potential technique in meeting all ITRS requirments. In this present work, we report a Cu-V alloy as a materials for the self-forming barrier process. And we investigated diffusion barrier properties of self-formed layer on low-k dielectrics with or without UV curing treatment. Cu alloy films were directly deposited onto low-k dielectrics by co-sputtering, followed by annealing at various temperatures. X-ray diffraction revealed Cu (111), Cu (200) and Cu (220) peaks for both of Cu alloys. The self-formed layers were investigated by transmission electron microscopy. In order to compare barrier properties between V-based interlayer on low-k dielectric with UV curing and interlayer on low-k dielectric without UV curing, thermal stability was measured with various heat treatment temperature. X-ray photoelectron spectroscopy analysis showed that chemical compositions of self-formed layer. The compositions of the V based self-formed barriers after annealing were strongly dominated by the O concentration in the dielectric layers.

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