• 한국금형공학회:학술대회논문집
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• 2008.06a
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• pp.35-38
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• 2008

A pattern master and a Ni stamper for 50nm class of patterns are fabricated through e-beam lithography and Ni electroforming process. A model pattern set is designed, which is based on unit patterns of 50nm, 100nm, 150nm and 200nm in length and 50nm in width. The e-beam process is optimized to fabricate designed patterns with some parameters including dose, accelerating voltage, focal distance and developing time. For Ni electroforming to fabricate Ni stamper, a seed layer, a conducting layer, is deposited first on the pattern master fabricated by an e-beam lithography process. Ni, Ti/Ni and Cr are first tested to find optimal seed layer process. Currently the best result is obtained when adopting Cr deposited to be 100nm thick with continuous tilting motion of the master substrate during the deposition process.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.4
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• pp.45-49
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• 2014

In this study, we grew non-polar ZnO nanostructure on (1-102) R-plane sapphire substrates. As for growth method of ZnO, we used hydrothermal synthesis which is known to have the advantages of low cost and easy process. For growth of non-polar, the deposited AZO seed buffer layer with of 80 nm on R-plane sapphire by radio frequency magnetron sputter was annealed by RTA(rapid thermal annealing) in the argon atmosphere. After that, we grew ZnO nanostructure on AZO seed layer by the added hexamethylenetramine (HMT) solution and sodium citrate at $90^{\circ}C$. With two types of additives into solution, we investigated the structures and shapes of ZnO nanorods. Also, we investigate the possibility of formation of 2D non-polar ZnO layer by changing the ratio of two additives. As a result, we could get the non-polar A-plane ZnO layer with well optimized additives' concentrations.

• Current Photovoltaic Research
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• v.1 no.2
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• pp.103-108
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• 2013

Epitaxial growth of a high-quality thin Si film is essential for the application to low-cost thin-film Si solar cells. A polycrystalline Si film was grown on a $SiO_2$ substrate at $450^{\circ}C$ by a Al-assisted crystal growth process. For the purpose, a thin Al layer was deposited on the $SiO_2$ substrate for Al-assisted crystal growth. However, the epitaxial growth of Si film resulted in a rough surface with humps. Then, we introduced a thin amorphous Si seed layer on the Al film to minimize the initial roughness of Si film. With the help of the Si seed layer, the surface of the epitaxial Si film was smooth and the crystallinity of the Si film was much improved. The grain size of the $1.5-{\mu}m$-thick Si film was as large as 1 mm. The Al content in the Si film was 3.7% and the hole concentration was estimated to be $3{\times}10^{17}/cm^3$, which was one order of magnitude higher than desirable value for Si base layer. The results suggest that Al-doped Si layer could be use as a seed layer for additional epitaxial growth of intrinsic or boron-doped Si layer because the Al-doped Si layer has large grains.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2003.05a
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• pp.481-484
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• 2003

In this study, we fabricated the master metallic nano-stamper with nano pillar patterns to apply replication processes which is adequate for mass production. Master nano patterns with various hole diameters between 300 nm and 1000 nm was fabricated by e-beam lithography. After the seed layer was deposited on the master nano patterns using e-beam evaporation, the nickel was electroformed. In each step, the shape and surface roughness of their patterns were analyzed using SEM and AFM.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.829-831
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• 2003

In the present study, the electroless plating method was applied instead of the sputtering as a formation method of metallic bus electrodes. No additional blackening step is needed in this method since this process provides a metallic seed layer with black color by a single step. The parameters which affects color and morphology of the metallic seed layer in the electroless plating solution were investigated

• Journal of the Microelectronics and Packaging Society
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• v.7 no.4
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• pp.23-29
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• 2000

We demonstrate the fabrication method of high-density and high-quality solder bump solving a copper (Cu) cross-contamination in Si-LSI laboratory. The Cu cross-contamination is solved by separating solder-bump process by two steps. Former is via-formation process excluding Cu/Ti under ball metallurgy (UBM) layer sputtering in Si-LSI laboratory. Latter is electroplating process including Ti-adhesion and Cu-seed layers sputtering out of Si-LSI laboratory. Thick photoresist (PR) is achieved by a multiple coating method. After TiW/Al-electrode sputtering for electroplating and via formation in Si-LSI laboratory, Cu/Ti UBM layer is sputtered on sample. The Cu-seed layer on the PR is etched during Cu-electroplating with low-electroplating rate due to a difference in resistance of UBM layer between via bottom and PR. Therefore Cu-buffer layer can be electroplated selectively at the via bottom. After etching the Ti-adhesion layer on the PR, Sn/Pb solder layer with a composition of 60/40 is electroplated using a tin-lead electroplating bath with a metal stoichiometry of 60/40 (weight percent ratio). Scanning electron microscope image shows that the fabricated solder bump is high-uniformity and high-quality as well as symmetric mushroom shape. The solder bumps with even 40/60 $\mu\textrm{m}$ in diameter/pitch do not touch during electroplating and reflow procedures. The solder-bump process of high-uniformity and high-density with the Cu cross-contamination free in Si-LSI laboratory will be effective for electronic microwave application.

• Korean Journal of Optics and Photonics
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• v.7 no.3
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• pp.280-286
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• 1996

This paper describes operation mechanism of a novel optical waveguide phase modulator with optical bistability characteristics by self electro-optic effect. The fabricated device structure is an optical waveguide modulator, using a refractive index change by an applied electric field, parallel integrated with SEED with an electrical bistability. GaAs/AlGaAs MQW is used as the core layer of the waveguide modulator and the absorption layer of SEED. The absorbed optical power in SEED changes the diode voltage and controls the optical power propagating through the waveguide phase modulator. Optical bistability of waveguide phase modulator is experimentally obtained by using electrical bistability of SEED. Compared to other waveguide modulators, the proposed one has an asset that the lowest optical power is required to generate optical bistability.

• Journal of the Korean Magnetics Society
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• v.13 no.3
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• pp.91-96
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• 2003

Cross-geometrical Cr/Co/Al-Ox/Co/Ni-Fe tunnel junctions were fabricated by magnetron sputtering. To form an insulating layer, The Al layer was oxidized in an atmosphere of oxygen-argon mixture at low power after deposition. To enhance the coercivity of the bottom Co layer, The Cr seed layer was deposited on the glass and it led to increase in coercivity. The coercivity increase is due to the increase of roughness through the Cr thickness. In over oxidation time, the oxidation of Co bottom layer and flat interface of insulator can increase the bottom Co coercivity. But TMR ratio gradually decrease. TMR ratio is relevant with Cr thickness, insulator thickness, and oxidation time. The maximum TMR ratio was 14% at room temperature and the TMR ratio was decreased to half at 0.51 V.

• Electrical & Electronic Materials
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• v.9 no.10
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• pp.1019-1026
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• 1996

In this study, we may be presented the carrier oscillation properties for the low-voltage varistor fabricated by a new method of three composition seed grain, in order to analyze the behavior of carriers at the its equivalent circuit model. The oscillation phenomena of carriers appeared from current-voltage characteristics under knee voltage is shown by the transient flow of nontrapped carriers group in the trap level of intergranular layer, surface state and/or depletion layer. In particularly, current oscillation phenomena is hardly shown in the high electric field. It is that the injected carriers from both electrodes are directly from the conduction band of forward biased ZnO grain through the intergranular layer into the reverse biased ZnO grain, because the trap level in the electric field above the knee voltage is mostly filled.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1159-1161
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• 1993

This paper may be presented the carrier oscillation properties for the varistor fabricated by a new method of three-composition seed grain, in order to analyze the behavior of carriers at the its equivalent circuit model. The oscillation phenomena of carriers appeared from current-voltage characteristics under knee voltage is shown by the transient flow of non trapped carriers group in the trap level of intergranular layer, surface state and/or depletion layer. However, Current oscillation phenomena is hardly shown in the high electric field. The injected carriers from both electrodes are directly flowed from the conduction band of forward biased grain through the intergranular layer into the reverse biased grain, because the trap level in the electric field above the knee voltage is mostly filled.