• 한국전기전자재료학회논문지
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• 제33권2호
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• pp.99-104
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• 2020

In this study, we fabricated a metamorphic high-electron-mobility transistor (mHEMT) device with a T-type gate structure for the implementation of W-band monolithic microwave integrated circuits (MMICs) and investigated its characteristics. To fabricate the mHEMT device, a recess process for etching of its Schottky layer was applied before gate metal deposition, and an e-beam lithography using a triple photoresist film for the T-gate structure was employed. We measured DC and RF characteristics of the fabricated device to verify the characteristics that can be used in W-band MMIC design. The mHEMT device exhibited DC characteristics such as a drain current density of 747 mA/mm, maximum transconductance of 1.354 S/mm, and pinch-off voltage of -0.42 V. Concerning the frequency characteristics, the device showed a cutoff frequency of 215 GHz and maximum oscillation frequency of 260 GHz, which provide sufficient performance for W-band MMIC design and fabrication. In addition, active and passive modeling was performed and its accuracy was evaluated by comparing the measured results. The developed mHEMT and device models could be used for the fabrication of W-band MMICs.

• 한국진공학회지
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• 제16권6호
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• pp.414-423
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• 2007

FED(Field Emission Display)는 특히 소형, 고품질 평면화면분야에서 종래의 기술들과 뚜렷이 구별되는 이점을 가지고 있다. FED를 실리콘 웨이퍼에 System-on-Chip(SoC)화하는 가능성을 검토하기 위해, 우리는 p-n 접합을 평면 디스플레이의 전자선원(electron beam source)으로 사용할 수 있는지를 실험하였다. Cantilever(외팔보)형 게이트로부터의 전계로 반전층을 형성하여 p-n 접합을 형성하는 새로운 구조를 제조하였다. 약 1 ${\mu}m$ 정도의 높이에 있는 cantilever형 게이트에 220V이상의 전압을 가했을 때 반전층(inversion layer)이 형성되었고, 애벌런치 항복이성공적으로 이루어졌다. 극히 얕은 p-n 접합에서 애벌런치 항복 시 관측되는 전자방출 효과와 그 특성이 비교되었고 실험결과와 향후 연구방향이 논의 되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권3호
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• pp.173-181
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• 2005

A new two dimensional (2-D) model for the potential distribution of fully depleted short-channel ion-implanted silicon MESFET's has been presented in this paper. The solution of the 2-D Poisson's equation has been considered as the superposition of the solutions of 1-D Poisson's equation in the lateral direction and the 2-D homogeneous Laplace equation with suitable boundary conditions. The minimum bottom potential at the interface of the depletion region due to the metal-semiconductor junction at the Schottky gate and depletion region due to the substrate-channel junction has been used to investigate the drain-induced barrier lowering (DIBL) and its effects on the threshold voltage of the device. Numerical results have been presented for the potential distribution and threshold voltage for different parameters such as the channel length, drain-source voltage, and implanted-dose and silicon film thickness.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권1호
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• pp.40-50
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• 2011

A two-dimensional (2D) analytical model for the potential distribution and threshold voltage of short-channel ion-implanted GaAs MESFETs operating in the sub-threshold regime has been presented. A double-integrable Gaussian-like function has been assumed as the doping distribution profile in the vertical direction of the channel. The Schottky gate has been assumed to be semi-transparent through which optical radiation is coupled into the device. The 2D potential distribution in the channel of the short-channel device has been obtained by solving the 2D Poisson's equation by using suitable boundary conditions. The effects of excess carrier generation due to the incident optical radiation in channel region have been included in the Poisson's equation to study the optical effects on the device. The potential function has been utilized to model the threshold voltage of the device under dark and illuminated conditions. The proposed model has been verified by comparing the theoretically predicted results with simulated data obtained by using the commercially available $ATLAS^{TM}$ 2D device simulator.

• 한국전기전자재료학회논문지
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• 제18권4호
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• pp.285-296
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• 2005

Reduced pressure chemical vapor deposition technology has been used to study SiGe heterostructure epitaxy and device issues, including SiGe relaxed buffers, proper control of Ge component and crystalline defects, two dimensional delta doping, and their influence on electrical properties of devices. From experiments, 2D profiles of B and P presented FWHM of 5 nm and 20 nm, respectively, and doses in 5×10/sup 11/ ∼ 3×10/sup 14/ ㎝/sup -2/ range. The results could be employed to fabricate SiGe/Si heterostructure field effect transistors with both Schottky contact and MOS structure for gate electrodes. I-V characteristics of 2D P-doped HFETs revealed normal behavior except the detrimental effect of crystalline defects created at SiGe/Si interfaces due to stress relaxation. On the contrary, sharp B-doping technology resulted in significant improvement in DC performance by 20-30 ％ in transconductance and short channel effect of SiGe HMOS. High peak concentration and mobility in 2D-doped SiGe heterostructures accompanied by remarkable improvements of electrical property illustrate feasible use for nano-sale FETs and integrated circuits for radio frequency wireless communication in particular.