• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.320-323
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• 2000

We attempted to fabricate polyurethane derivatives (PU-CN, PU-DCM) LB films by using LB method. Also, we investigated the monolayer behavior at the air-water interface by surface pressure-area ($\pi$-A) isotherms. And, the surface morphologies and the physicochemical properties of LB films were investigated by atomic force microscopy (AFM) and UV-vis spectroscopy, respectively. Also, the electrical properties of polyurethane derivatives LB films were investigated by using the conductivity and the dielectric constant. In the AFM images, we conclude that surface morphology of PU-DCM LB films is smooth and homogeneous and has optimal hydrophobicity and good stability, whereas PU-CN LB films give rougher surfaces with more excess material. In the I-V characteristics, the conductivity is different as to the polyurethane derivatives, it is considered that this phenomena could be described by the difference of lumophore pendant which was adhered at PU main chain.

• Korean Journal of Materials Research
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• v.29 no.7
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• pp.408-411
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• 2019

ZTO/n-Si thin film is produced to investigate tunneling phenomena by interface characteristics by the depletion layer. For diversity of the depletion layer, the thin film of ZTO is heat treated after deposition, and the gpolarization is found to change depending on the heat treatment temperature and capacitance. The higher the heat treatment temperature is, the higher the capacitance is, because more charges are formed, the highest at $150^{\circ}C$. The capacitance decreases at $200^{\circ}C$ ZTO heat treated at $150^{\circ}C$ shows tunneling phenomena, with low non-resistance and reduced charge concentration. When the carrier concentration is low and the resistance is low, the depletion layer has an increased potential barrier, which results in a tunneling phenomenon, which results in an increase in current. However, the ZTO thin film with high charge or high resistance shows a Schottky junction feature. The reason for the great capacitance increase is the increased current due to tunneling in the depletion layer.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.5
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• pp.1149-1154
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• 2014

To observe the tunneling phenomenon of oxide semiconductor transistor, The Indium-gallum-zinc-oxide thin film transistors deposited on SiOC as a gate insulator was prepared. The interface characteristics between a dielectric and channel were changed in according to the properties of SiOC dielectric materials. The transfer characteristics of a drain-source current ($I_{DS}$) and gate-source voltage ($V_{GS}$) showed the ambipolar or unipolar features according to the Schottky or Ohmic contacts. The ambipolar transfer characteristics was obtained at a transistor with Schottky contact in a range of ${\pm}1V$ bias voltage. However, the unipolar transfer characteristics was shown in a transistor with Ohmic contact by the electron trapping conduction. Moreover, it was improved the on/off switching in a ambipolar transistor by the tunneling phenomenon.

• Korean Journal of Materials Research
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• v.27 no.1
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• pp.48-52
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• 2017

In this study, we used I-V spectroscopy, photoconductivity (PC) yield and internal photoemission (IPE) yield using IPE spectroscopy to characterize the Schottky barrier heights (SBH) at insulator-semiconductor interfaces of Pt/$HfO_2$/p-type Si metal-insulator-semiconductor (MIS) capacitors. The leakage current characteristics of the MIS capacitor were analyzed according to the J-V and C-V curves. The leakage current behavior of the capacitors, which depends on the applied electric field, can be described using the Poole-Frenkel (P-F) emission, trap assisted tunneling (TAT), and direct tunneling (DT) models. The leakage current transport mechanism is controlled by the trap level energy depth of $HfO_2$. In order to further study the SBH and the electronic tunneling mechanism, the internal photoemission (IPE) yield was measured and analyzed. We obtained the SBH values of the Pt/$HfO_2$/p-type Si for use in Fowler plots in the square and cubic root IPE yield spectra curves. At the Pt/$HfO_2$/p-type Si interface, the SBH difference, which depends on the electrical potential, is related to (1) the work function (WF) difference and between the Pt and p-type Si and (2) the sub-gap defect state features (density and energy) in the given dielectric.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.1
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• pp.15-23
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• 2002

In this study, metal/ZnO contacts were thermally annealed at different temperatures (as-dep., 400$^{\circ}C$, 600$^{\circ}C$, 800$^{\circ}C$, 1000$^{\circ}C$) for the investigation of electrical properties, and surface and interface characteristics. The analysis of the element composition and the chemical bonding state of the surface was made by the XPS(X-ray photoelectron spectroscopy). An attempt was made to establish the electrical property-microstructure relationship for the (Ti, Au)/ZnO. The Ti/ZnO contact exhibits an ohmic characteristics with a relatively high contact resistance of 4.74${\times}$10$\^$-1/ $\Omega$$\textrm{cm}^2$ after an annealing at 400$^{\circ}C$. The contact showed a schottky characteristics when the samples were annealed at higher temperature than 400$^{\circ}C$. The transition from the ohmic to schottky characteristics was contributed from the formation of the oxide layers as was confirmed by the peaks for O-O and Ti-O bondings in XPS analysis. For the Au/ZnO contact the lowest contact resistance was obtained from the as-deposited sample. The resistance was slowly increased with annealing temperature up to 600$^{\circ}C$. The ohmic characteristics were maintained eden fort 600$^{\circ}C$ annealing. The XPS analysis showed that the Au-O intensity was dramatically decreased with temperature above 600$^{\circ}C$.

• Korean Journal of Materials Research
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• v.11 no.2
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• pp.151-154
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• 2001

The leakage current behaviors of PLZT capacitors with top electrodes of Pt, Ir, and $IrO_2$ are investigated before and after hydrogen forming gas anneal. The P-E hysteresis and fatigue properties of Pt/PLZT/Pt capacitors are almost recovered after recovery anneal in $O_2$ ambient. The leakage current mechanisms of PLZT capacitors with Pt and $IrO_2$ top electrodes are consistent with space-charge influenced injection model showing the strong time dependence irrespective of annealing conditions. On the other hand, the leakage current behavior of Ir/PLZT/Pt capacitor shows steady state independent of time because IrPb, conducting phase, formed at interface between Ir top and PLZT is a high conduction path. Teh leakage current mechanism of Ir/PLZT/Pt capacitor is consistent with Schottky barrier model.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.12
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• pp.2366-2373
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• 2007

In this paper, a low-power and small-area asynchronous 1 kilobit EEPROM for passive UHF RFID tag chips is designed with $0.18{\mu}m$ EEPROM cells. As small area solutions, command and address buffers are removed since we design asynchronous I/O interface and data output buffer is also removed by using separate I/O. To supply stably high voltages VPP and VPPL used in the cell array from low voltage VDD, Dickson charge pump is designed with schottky diodes instead of a PN junction diodes. On that account, we can decrease the number of stages of the charge pump, which can decrease layout area of charge pump. As a low-power solution, we can reduce write current by using the proposed VPPL power switching circuit which selects each needed voltage at either program or write mode. A test chip of asynchronous 1 kilobit EEPROM is fabricated, and its layout area is $554.8{\times}306.9{\mu}m2$., 11% smaller than its synchronous counterpart.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.310-313
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• 2000

In this study, the Au/Ni and Au/Ni/Si/Ni layers prepared by electron beam evaporation were used to form ohmic contacts on p-type GaN. Before rapid thermal annealing, the current-voltage(I-V) characteristic of Au/Ni and Au/Ni/Si/Ni contact on p-type GaN film shows non-ohmic behavior. A Specific contact resistance as 3.4$\times$10$^{-4}$ Ω-$\textrm{cm}^2$ was obtained after 45$0^{\circ}C$-RTA. The Schottky barrier height reduction may be attributed to the presence of Ga-Ni and Ga-Au compounds, such as Ga$_4$Ni$_3$, Ga$_4$Ni$_3$, and GaAu$_2$ at the metal - semiconductor interface. The mixing behaviors of both Ni and Au have been studied by using X-ray photoelectron spectroscopy. In addition, X-ray diffraction measurements indicate that the Ni$_3$N, NiGa$_4$, Ni$_2$Si, and Ni$_3$Si$_2$ Compounds were formed at the metal-semiconductor interface.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.314-315
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• 2008

We have studied a property change of organic light-emitting diodes (OLED)s due to a surface reformation of indium-tin-oxide(ITO) substrate. An ITO is widely used as a transparent electrode in light-emitting diodes, and the OLEDs device performance is sensitive to the surface properties of the ITO. The ITO surface reformation could reduce the Schottky barrier at the ITO/organic interface and increase the adhesion of the organic layer onto the electrode. We have studied the characteristics of OLEDs with a treatment by a wet processing of the ITO substrate. The self-assembled monolayer(SAM) was used for wet processing. The characteristics of OLEDs were improved by SAM treatment of an ITO in this work. The OLEDs with a structure of ITO/TPD(50nm)/$Alq_3$(70nm)/LiF(0.5nm)/Al(100nm) were fabricated, and the surface properties of ITO were investigated by using seneral characterization techniques. Self-assembled monolayer introduced at the anode/organic interface gave an improvement in turn-on voltage, luminance and external quantum efficiency compared to the device without the SAM layer. SAM-treatment time of the ITO substrate was made to be 0/10/15/20/25min. The current efficiency of the device with 15min. treated SAM layer was increased by 3 times and the external quantum efficiency by 2.6 times.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.412-415
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• 2015

This paper presents a MPPT(Maximum Power Point Tracking) control CMOS interface circuit for vibration energy harvesting. The proposed circuit consists of an AC-DC converter, MPPT Controller, DC-DC boost converter and PMU(Power Management Unit). The AC-DC converter rectifies the AC signals from vibration devices(PZT). MPPT controller is employed to harvest the maximum power from the PZT and increase efficiency of overall system. The DC-DC boost converter generates a boosted and regulated output at a predefined level and provides energy to load using PMU. A full-wave rectifier using active diodes is used as the AC-DC converter for high efficiency, and a schottky diode type DC-DC boost converter is used for a simple control circuitry. The proposed circuit has been designed in a 0.35um CMOS process. The chip area is $950um{\times}920um$.