• JSTS:Journal of Semiconductor Technology and Science
• /
• v.14 no.3
• /
• pp.345-355
• /
• 2014

Today's System-on-a-Chip (SoC) is designed with reusable IP cores to meet short time-to-market requirements. However, the increasing cost of testing becomes a big burden in manufacturing a highly integrated SoC. In this paper, an efficient parallel scan test technique is introduced to minimize the test application time. Multiple scan enable signals are adopted to implement scan architecture to achieve optimal test application time for the test patterns scheduled for concurrent scan test. Experimental results show that testing times are considerably reduced with little area overhead.

• Proceedings of the KSME Conference
• /
• 2001.06a
• /
• pp.84-89
• /
• 2001

Ultrasonic pulse echo method comes to be difficult to apply to the multi-layered structure with very thin layer, because the echoes from the top and the bottom of the layer are overlapped. Conventionally method, deconvolution technique has been used for the decomposition of overlapped UT signals, however it has disabilities when the waveform of the transmitted signal is distorted according to the propagation. In this paper, the wavelet transform based deconvolution (WTBD) technique is proposed as a new signal processing method that can decompose the overlapped echo signals in A-Scan signal with superior performances compared to the conventional deconvolution technique. Performances of the proposed method are shown by through computer simulations using model signal with noise and are demonstrated by through experiments for the fabricated acryl rod with a thin steel plate bonded to it.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.3
• /
• pp.286-292
• /
• 2012

Scan techniques are almost mandatorily adopted in designing current System-on-a-Chip (SoC) to enhance testability, but inadvertently secret keys can be stolen through the scan test channels of crypto SoCs. An efficient scan design technique is proposed in this paper to protect the secret key of an Advanced Encryption Standard (AES) core embedded in an SoC. A new instruction is added to IEEE 1149.1 boundary scan to use a fake key instead of user key, in which the fake key is chosen with meticulous care to improve the testability as well. Our approach can be implemented as user defined logic with conventional boundary scan design, hence no modification is necessary to any crypto IP core. Conformance to the IEEE 1149.1 standards is completely preserved while yielding better performance of area, power, and fault coverage with highly robust protection of the secret user key.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.10a
• /
• pp.892-895
• /
• 2011

Power consumption during testing System-On-Chip (SOC) are becoming increasingly important as the IP core increases in SOC. We present a new algorithm to reduce the scan-in power using the modified scan latch reordering and clock gating. We apply scan latch reordering technique for minimizing the hamming distance in scan vectors. Also, during scan latch reordering, the don't care inputs in scan vectors are assigned for low power. Also, we apply the clock gated scan cells. Experimental results for ISCAS 89 benchmark circuits show that reduced low power scan testing can be achieved in all cases.

• Proceedings of the IEEK Conference
• /
• 1999.11a
• /
• pp.392-395
• /
• 1999

The state assignment for a finite state machine greatly affects the delay, area, and testabilities of the sequential circuits. In order to minimize the dependencies among state variables, therefore possibly to reduce the length and number of feedback cycles, a new state assignment technique based on m-block partition is introduced in this paper. After the completion of state assignment and logic synthesis, partial scan design is performed to choose minimal number of scan flip-flops. Experiment shows drastic improvement in testabilities while preserving low area and delay overhead.

• The KIPS Transactions:PartB
• /
• v.17B no.2
• /
• pp.115-124
• /
• 2010

Stereo matching techniques are categorized in two major schemes, local and global matching techniques. In global matching schemes, several investigations are introduced, where cost accumulation is performed in multiple matching lines. In this paper, we introduce a new multi-line stereo matching techniques which expands a conventional single-line matching scheme to multiple one. Matching cost is based on simple normalized cross correlation. We expand the scan-line optimization technique to a multi-line scan-line optimization technique. The proposed technique first generates a reliability image, which is iteratively updated based on the previous reliability measure. After some number of iterations, the reliability image is completed by a hole-filling algorithm. The hole-filling algorithm introduces a disparity score table which records the disparity score of the current pixel. The disparity of an empty pixel is determined by comparing the scores of the neighboring pixels. The proposed technique is tested using the Middlebury and CMU stereo images. The error analysis shows that the proposed matching technique yields better performance than using conventional global matching algorithm.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.17 no.3
• /
• pp.103-108
• /
• 2016

This study examined the effectiveness of the multitransmit parallel technique on the MRI scan time reduction by removing the dielectric effect. The T1 and T2 weighted images of the patients' hip joint were acquired with and without a multitransmit technique. The ROIs were located in the head of femur and iliopsoas muscle. The SNR, CNR and scan time were measured and compared. There was no difference in the images with and without multitransmit. In contrast, the acquisition time was decreased by 42.8% in T1WI and 49.7% in T2WI. In conclusion, this study demonstrated that significant scan time reductions can be accomplished without any differences in the image quality in hip joint MRI by applying the multitransmit parallel technique. Furthermore, the multitranstmit technique is useful in other body parts to resolve the long scan time of an MRI examination.

• The Korean Journal of Nuclear Medicine Technology
• /
• v.12 no.3
• /
• pp.192-198
• /
• 2008

Purpose: The scan time reduction helps to yield more accurate results and induce the minimization of patient's motion. Also we can expect that satisfaction of examination will increase. Nowdays medical equipment companies have developed various programs to reduce scan time. We used Onco. Flash (Pixon method, SIEMENS) that is an image processing technique gated cardiac blood pool scan and going to evaluate its clinical usefullness. Materials and Method: We analyzed the 50 patients who were examined by gated blood pool scan in nuclear medicine department of Asan Mediacal Center from June $20^{th}$ 2008 to August $14^{th}$ 2008. We acquired the Full-time (6000 Kcounts) and Half-time (3000 Kcounts) LAO image in same position. And we acquired LVEF values ten times from Full-time, Half-time images acquired by the image processing technique and analyzed its mean and standard deviation values. To estimate LVEF in same conditions, we set automatic location of the LV ROI and background ROI based on same X and Y-axis. Also we performed blinding tests to physician. Results: After making a quantitative analysis of the 50 patients EF values, each mean${\pm}$standard deviation is shown at Full-time image $68.12{\pm}7.84%$, Half- time (acquired by imaging processing technique) $68.49{\pm}8.73%$. In the 95% confidence limit, there was no statistically significant difference (p>0.05). After blinding test with a physician for making a qualitative analysis, there was no difference between Full-time image and Half-time image acquired by the image processing technique for observing LV myocardial wall motion. Conclusion: Gated cardiac blood pool scan has been reported its relatively exact EF measured results than ultrasound or CT. But gated cardiac blood pool scan takes relatively longer time than other exams and now it needs to improve time competitive power. If we adapt Half-time technique to gated cardiac blood pool scintigraphy based on this study, we expect to reduce possible artifacts and improve accessibility as well as flexibility to exam. Also we expect patient's satisfaction.

• Journal of KIISE:Computer Systems and Theory
• /
• v.36 no.1
• /
• pp.33-39
• /
• 2009

This paper presents a new secure scan design technique to protect secret key from scan-based side channel attack for an Advanced Encryption Standard(AES) core embedded on an System-on-a-Chip(SoC). Our proposed secure scan design technique can be applied to crypto IF core which is optimized for applications without the IP core modification. The IEEE1149.1 standard is kept, and low area and power consumption overheads and high fault coverage can be achieved compared to the existing methods.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.2
• /
• pp.77-86
• /
• 2010

This paper presents an efficient secure scan design technique which is based on a fake key and IEEE 1149.1 instruction to protect secret key from scan-based side channel attack for an Advanced Encryption Standard (AES) core embedded on an System-on-a-Chip (SoC). Our proposed secure scan design technique can be applied to crypto IP core which is optimized for applications without the IP core modification. The IEEE 1149.1 standard is kept, and low area, low power consumption, very robust secret-key protection and high fault coverage can be achieved compared to the existing methods.