• Title/Summary/Keyword: SNR[dB]

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Performance Evaluation of Bandwidth Efficient Adaptive QAM Schemes in Flat and Frquency Selective Fading Channels (균일 및 주파수 선택적 페이딩에서 대역폭 효율의 적응 QAM 성능분석)

  • 정연호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10A
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    • pp.1473-1479
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    • 2000
  • This paper presents the performance evaluation of an adaptive QAM scheme under flat and frequency selective fading channels for indoor wireless communication systems. The QAM modulation is combined with differential encoding and the demodulation process is carried out noncoherently. The adaptation is performed by varying the modulation level of QAM, depending upon received signal strength. The adaptation mechanism allows a 2- or 3-bit increase or decrease at a time, if the channel condition is considered to be significantly good or bad. Simulation results show that the average number of bits per symbol (ABPS) for each symbol block transmitted over a flat fading channel is higher than 5.0 and the BER performance is better than 10^-4 for a SNR value higher than 30 dB. For frequency selective fading channels, an oversampling technique in the receiver was employed. The BER performance obtained for frequency selective fading channels is better than 10^-4 with a SNR value of 40 dB and ABPS is found to be approximately 5.5. Therefore, this scheme is very useful in that it provides both very high bandwidth efficiency and acceptable performance with moderate SNR values over flat and frequency selective fading channels. In addition, this scheme provides reduced receiver complexity by way of noncoherent detection.

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Two-Channel Noise Reduction Using Beamforming and DOA-Based Masking (빔포밍 및 DOA 기반의 마스킹을 이용한 2채널 잡음제거)

  • Kim, Youngil;Jeong, Sangbae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.32-40
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    • 2013
  • In this paper, we propose a multi-channel speech enhancement algorithm using beamforming and direction-of-arrival (DOA)-based masking. The proposed algorithm enhances noisy speech basically by the linearly constrained minimum variance (LCMV) algorithm and then a mel-scale Wiener filter designed using DOA-based masking is applied to remove still remaining noises. To improve the performance, we optimize the learning rate of the adaptive filters in LCMV and the DOA threshold to detect target speech spectrum. As performance indices, the perceptual evaluation of speech quality (PESQ) score and output SNRs are measured. Experimantal results show that the proposed algorithm outperforms the conventional LCMV beamformer by 0.09 in PESQ score and 5.75 dB in output SNR, respectively.

A Low-Voltage Low-Power Delta-Sigma Modulator for Cardiac Pacemaker Applications (심장박동 조절장치를 위한 저전압 저전력 델타 시그마 모듈레이터)

  • Chae, Young-Cheol;Lee, Jeong-Whan;Lee, In-Hee;Han, Gun-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.52-58
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    • 2009
  • A low voltage, low power delta-sigma modulator is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a $0.35-{\mu}m$ CMOS process, and it achieves 61-dB SNDR, 63-dB SNR, and 65-dB DR for a 120-Hz signal bandwidth at 7.6-kHz sampling frequency. The power consumption is only 280 nW at 1-V power supply.

Interference Cancellation On-Channel Regenerative Repeater Laboratory Test for ATSC Terrestrial Broadcasting (ATSC 지상파 방송을 위한 간섭제거 동일 채널 재생 중계기 성능평가)

  • Kim, Yong-Seok;Ki, Jang-Geun;Lee, Kyu-Tae
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.12 no.2
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    • pp.43-52
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    • 2012
  • This paper presents and analyzes laboratory test results of Interference Cancellation Digital On Channel Regenerative Repeater(IC-DOCR) to broadcast digital television signals in the Advanced Television Systems Committee(ATSC) transmission systems using single frequency networks(SFN). IC-DOCR laboratory test is classified to receiver test, transmitter test, and feedback interference cancellation test. The receiver part includes random noise, single echo, multi-path ensembles, and adjacent channel interference test. The transmitter part includes out-of channel emission, equality of transmitting signal, and phase noise test. By the laboratory test, the receiver part of the IC-DOCR eliminates 28dB of feedback signal higher than the received signal and has 17.8dB at TOV(Threshold Of Visibility) under random noise environment. Also, the transmitter part satisfies the specification of US FCC(Federal Communications Commission) as well as maintains good output signal quality for guaranteeing more than SNR 30dB.

Performance Analysis of OFDM Communication System with the IQ Imbalance and Phase Noise (IQ Imbalance와 위상 잡음을 고려한 OFDM 통신 시스템의 성능 분석)

  • Kim, Sang-Kyun;Ryu, Heung-Gyoon;Kang, Byung-Su;Lee, Kwang-Chun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.7
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    • pp.757-765
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    • 2007
  • OFDM system is an excellent high speed transmission method but it is seriously sensitive to the phase noise and IQ imbalance. Therefore, in this paper, we analyze the communication performance of the OFDM communication system with IQ imbalance and phase noise. Phase noise's variance can be calculated by integral calculus of phase noise power spectrum. From simulation results, it can be shown that the BER performances show different change according to the phase noise variance and IQ imbalance amount. When amplitude imbalance is ${\varepsilon}$=0.2; 0.3; 0.4 and phase imbalance is ${\phi}=10^0$, and distribution of phase noise is ${\sigma}^2=0.012$, BER is degraded by 2.88 dB, 3.61 dB, 4.09 dB in $10^{-5}$ in the respect of the SNR penalty.

A Low-Power CMOS Continuous-Time Sigma-Delta Modulator for UMTS Receivers (UMTS용 수신기를 위한 저 전력 CMOS 연속-시간 시그마-델타 모듈레이터)

  • Lim, Jin-Up;Choi, Joong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.8
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    • pp.65-73
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    • 2007
  • This paper presents a low power CMOS continuous-time $\Sigma\Delta$ (sigma-delta) modulator for UMTS receivers. The loop filter of the continuous-time $\Sigma\Delta$ modulator consists of an active-RC filter which performs high linearity characteristics and has a simple tuning circuit for low power operating system The architecture of this modulator is the $3^{rd}-order$ 4-bit single loop configuration with a 24 of OSR (Oversampling Ratio) to increase the power efficiency. The modulator includes a half delay feedback path to compensate the excess loop delay. The experimental results of the modulator are 71dB, 65dB and 74dB of the peak SNR, peak SMR and dynamic range, respectively. The continuous-time $\Sigma\Delta$ modulator is fabricated in a 0.18-um 1P4M CMOS standard process and dissipates 15mW for a single supply voltage of 1.8V.

An Algorithm for Estimating Ep/No of UWB Signals (UWB 신호의 Ep/No 추정 알고리즘)

  • Im, Sung-Bin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.9C
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    • pp.1316-1322
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    • 2004
  • Recently, the UWB (ultra wide-band) wireless communication technology, which provides high data transmission and is capable of linearly trading between throughput and signal-to-noise ratio (SNR), has drawn much attention for short-range wireless networks. Fully exploiting its notable features and minimizing its interference to coexisting other systems require the knowledge of SNR's at receivers In this paper, we propose an algorithm for estimating the pulse energy to noise ratio Ep/No of UWB signal with utilization of outputs from a correlator at a receiver, and evaluate the performance of the proposed algorithm through computer simulation. According to simulation results, the maximum standard deviation is about 1 13 dB with a block size of 500. Except for Ep/No=O and 2 dB cases with a block size of 500, no errors greater than 3 dB were observed in all the remaining experiments. Generally speaking, it improves as the true Ep/No, increases and as the block size increases A notable feature of the proposed algorithm is that it does not reduce the effective throughput because the estimation process does not require sending additional training signal of any specific format.

Improvement of DS System using Transversal Filter for Advanced Duty Rate on Meteor Burst Channel (유성 버스트 채널 도통율 향상을 위해 Transversal Filter를 적용한 DS시스템의 개선)

  • Kwon Hyeog-Soong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6A
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    • pp.627-633
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    • 2006
  • In spite of many advantages of Meteor Burst Communications(MBC) on its transmission channel, the fact that its duty rate is less than 10 percents is a considerable deficiency of MBC. To overcome with this deficiency without paying large cost, we use a direct sequence(DS) simple reception system. This method doesn't need to add the components for acquisition or tracking the signal so that it keeps the cost efficiency of the MBC. But it has a disadvantage that its duty rate shows a large decline by noise. For this problem we adopt the proposed system applying a transversal filter circuit. The improvement by this method is more significant when the received signal is weak Simulation results show as t1 is 100ms, then the burst length would be increased by 35% when the initial value of the received signal power increases by 3 dB, t2 is 135ms. If the power increases by 6dB the burst length would be 170ms thus increased by 70%, which shows a great enhancement. Suppose now that t1 is 50ms and the power is increased by 3dB, then t2 would be increased by 70% to 85ms, and increasing the power by 6dB it would be increased by 130% to 115ms.

A Study on the ADC for High Speed Data Conversion (고속 데이터 변환을 위한 ADC에 관한 연구)

  • Kim, Sun-Youb;Park, Hyoung-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.3
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    • pp.460-465
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    • 2007
  • In this paper, the pipelined A/D converter with multi S/H stage structure is proposed for high resolution and high-speed data conversion rate. In order to improve a resolution and operational speed, the proposed structure increased the sampling time that is sampled input signal. In order to verify the operation characteristics 20MS/s pipelined A/D converter is designed with two S/H stage. The simulation result shows that INL and DNL are $0.52LSB{\sim}-0.63LSB$ and $0.53LSB{\sim}-0.56LSB$, respectively. Also, the designed Analog-to-Digital converter has the SNR of 43dB and power consumption is 18.5mW.

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Multi-Channel Audio CODEC with Channel Interference Suppression

  • Choi, Moo-Yeol;Lee, Sung-No;Lee, Myung-Jin;Lee, Yong-Hee;Park, Ho-Jin;Kong, Bai-Sun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.6
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    • pp.608-614
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    • 2015
  • A multi-channel audio CODEC with inter-channel interference suppression is proposed, in which channel switching noise-referred sampling error is significantly reduced. It also supports a coarse/fine mode operation for fast frequency tracking with good harmonic performance. The proposed multi-channel audio CODEC was designed in a 65 nm CMOS process. Measured results indicated that SNR and SNDR of ADC were 93 dB and 84dB, respectively, with SNDR improved by 43 dB. Those of DAC were 96 dB and 87 dB, respectively, with SNDR improved by 45 dB when all the channels are running independently.