• Journal of Welding and Joining
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• 제14권2호
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• pp.71-78
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• 1996

In order to rpovide proper SMT design criteria in a systematic way, a mathematical formulation has been developed to predict the configuration of the solder fillet formed between the gullwing type lead and rectangular pad. Effects of SMT design parameters such as the solder volume and pad dimension on the solder profile are investigated using the FEM that calculates the 3D configuration by minimizing the energy due to surface tension and gravity in the equilibrium state. Design criteria of QFP and SOP are illustrated by plotting the acceptable range of the solder volume with respect to the length and width ratios of the pad and lead. The results show that the acceptable design range increases with increase in the pad length and width. The pad length has more significant effects on design criteria compared with the pad width, and Bond number can be utilized to predict the joint quality.

• 마이크로전자및패키징학회지
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• 제27권3호
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• pp.35-39
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• 2020

Nonwet (Head in Pillow) 불량은 SMT(surface mount technology) 공정 불량 유형 중 하나로 이 불량은 solder paste misalign, reflow 조건, package warpage, package ball size 등과 같은 인자에 따라 불량이 발생을 한다. 이에 본 논문은 Nonwet 발생 인자 중 ① reflow 조건 ② package ball & solder paste misalign ③ package ball 크기 type에 대한 인자를 선정하여 nonwet 실험을 진행하였다. 먼저 reflow 조건의 경우 soldering 시간이 길 경우 nonwet risk가 증가를 하나, reflow 공정에 N₂를 적용할 시 solder ball 산화 억제에 따른 nonwet 개선을 확인 할 수 있었다. 또한 package ball과 solder paste misalign 발생 시 ball과 paste의 접촉 깊이가 20 ㎛ 이하의 경우 nonwet에 취약 했으며, package ball 체면적이 작을수록 nonwet 관점 개선됨을 확인 할 수 있었다.

• 반도체디스플레이기술학회지
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• 제14권3호
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• pp.57-60
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• 2015

Electric power in large devices is controlled by digital circuits, such as switching mode power supply. This kind of power circuits require accurate current sensor for power distribution. We studied characteristics of shunt resistor, which has many advantages for commercial application compared to Hall-effect current sensor. We applied ceramic package to the shunt resistor. Ceramic package has good thermal conductivity compared to plastic package, and this point is important for space requirement in Printed Circuit Board (PCB). Another advantage of the ceramic package is that surface mount technology (SMT) can be used for production. Our experimental results showed that the ceramic packaged resistor showed about 50% lower temperature than the plastic packaged one. Burning point and frequency characteristics are also discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 D
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• pp.2453-2455
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• 2003

We propose a path planning method to reduce the inspection time of AOI (automatic optical inspection) machines in SMT (surface mount technology) in-line system. Inspection windows of board should be clustered to consider the FOV (field-of-view) of camera. The number of clusters is desirable to be minimized in order to reduce the overall inspection time. We newly propose a genetic algorithm to minimize the number of clusters for a given board. Comparative simulation results are presented to verify the usefulness of proposed algorithm.

• Transactions on Electrical and Electronic Materials
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• 제13권3호
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• pp.129-135
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• 2012

A number of surface mount technology (SMT) process variables including land design are considered for minimizing tombstone defect in flexible printed circuit assembly in high volume manufacturing. As SMT chip components have been reduced over the past years with their weights in milligrams, the torque that once helped self-centering of chips, gears to tombstone defects. In this paper, we have investigated the correlation of the assembly process variables with respect to the tombstone defect by employing statistically designed experiment. After the statistical analysis is performed, we have setup hypotheses for the root causes of tombstone defect and derived main effects and interactions of the process parameters affecting the hypothesis. Based on the designed experiments, statistical analysis was performed to investigate significant process variable for the purpose of process control in flexible printed circuit manufacturing area. Finally, we provide beneficial suggestions for find-pitch PCB design, screen printing process, chip-mounting process, and reflow process to minimize the tombstone defects.

• 제어로봇시스템학회논문지
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• 제21권8호
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• pp.788-793
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• 2015

This paper proposes a path planning algorithm to reduce the inspection time of AOI (Automatic Optical Inspection) machines for SMT (Surface Mount Technology) in-line system. Since the field-of-view of the camera attached at the machine is much less than the entire inspection region of board, the inspection region should be clustered to many groups. The image acquisition time depends on the number of groups, and camera moving time depends on the sequence of visiting the groups. The acquired image is processed while the camera moves to the next position, but it may be delayed if the group includes many components to be inspected. The inspection delay has influence on the overall job time of the machine. In this paper, we newly considers the inspection delay time for path planning of the inspection machine. The unified approach using genetic algorithm is applied to generates the groups and visiting sequence simultaneously. The chromosome, crossover operator, and mutation operator is proposed to develop the genetic algorithm. The experimental results are presented to verify the usefulness of the proposed method.

• 마이크로전자및패키징학회지
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• 제23권4호
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• pp.43-48
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• 2016

3-Dimensional System in Package (3-D SiP) structure (Amkor calls it mPossum-molded Possum) using double side Surface Mount Technology (SMT) and double side molding was evaluated in order to achieve small/thin form factor as well as good functionality by integration and double side layout. As the new platform on laminate substrate basis, molding process was challenge in mold flow balance at top and bottom side and package warpage control over the overall assembly process. There were two types of different molding process evaluated with 1) 1-step molding which was done at both side at the same time and 2) 2-step molding which was done at the conventional molding process twice. Mold simulation helped to narrow down the material selections and parameters available before actual sample build. There were many challenges for this first trial in design/ parameter and material types but optimized them to enable this structure.

• 한국컴퓨터정보학회논문지
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• 제27권11호
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• pp.115-121
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• 2022

표면실장기술(SMT)에서 솔더 크림을 바르는 장비인 스크린 프린터는 패드가 작아지면서 도포 불량이 많이 발생한다. 이를 해결하기 위해 최근에는 젯 프린터를 사용하고 있다. 그런데 젯 프린터 헤드에 적용하는 밸브의 끝단 노즐을 깨끗하게 청소하지 않으면 과납이나 오도포가 발생한다. 이를 방지하기 위해서는 노즐을 주기적으로 청소해줘야 한다. 본 논문에서는 젯 프린터의 안정적인 솔더 크림 도포를 위하여 기존 기술보다 더욱 안정적으로 청소하는 방법을 제시하였다. 이 방법은 35mm 폭의 무진천을 재단하여 롤 형태로 감아 놓고, 반대쪽에 DC 기어드 모터로 회전시켜 닦는다. 그 결과 약 2,000회 도팅 주기로 청소를 했을 때 노즐 표면에 솔더 페이스트가 남지 않고 잘 닦이는 것을 확인하였다.

• 산업경영시스템학회지
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• 제16권28호
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• pp.1-8
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• 1993

Electrical or electronic products have been becoming smaller and high integrated recently, with printed circuit boards(PCB's) being the key components for these products. The introduction of new technology of surface mounted devices(SMD) opens new ways towards high integration on the PCB. Many plants in eletronical industry which produce high variety of PCB's to meet the demands of customer orders require flexibility in PCB's production lines. This survey paper describes the related optimization problems and solution methods to the automated surface mount technology(SMT) assembly lines, and provides with the research direction for improving flexibility.

• 한국산학기술학회논문지
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• 제15권8호
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• pp.5269-5279
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• 2014

SMT에 의한 PCB 조립에서 발생하는 가장 큰 불량의 원인은 솔더의 도포이다. 기존의 솔더 도포의 검사 방법은 신뢰도가 낮고 검사 속도가 느리며 가격이 높다. 본 논문에서는 2차원 영상을 추가로 획득하지 않고, 3차원 형상정보에서 PCB 위의 솔더영역을 검출하고 높이를 계산하는 방법을 제안한다. 솔더영역은 3차원 형상정보에서 측정점과 PCB 전체의 위상평균의 상대적 위상에 의하여 추출한다. 또 솔더영역의 높이를 신뢰도 높게 측정하기 위하여, 솔더영역의 높이는 반복능과 신뢰도를 적용한 측정점들의 위상평균으로 계산된다. 제안한 방법에 대한 측정실험 결과 검사시간에서 17.5%, 높이계산에서 29%의 반복능 향상을 보였으며, SPI장비 가격 인하 및 검사시간 단축 효과가 있다.