• Journal of Institute of Control, Robotics and Systems
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• v.21 no.3
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• pp.276-282
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• 2015

This paper proposes a SMD (surface mounting device) classification method for the PCB assembly inspection machines. The package types of SMD components should be classified to create the job program of the inspection machine. In order to reduce the creation time of job program, we developed the automatic classification algorithm for the SMD packages. We identified the chip-type packages by color and edge distribution of the images. The input images are transformed into the HSI color model, and the binarized histroms are extracted for H and S spaces. Also the edges are extracted from the binarized image, and quantized histograms are obtained for horizontal and vertical direction. The neural network is then applied to classify the package types from the histogram inputs. The experimental results are presented to verify the usefulness of the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.4 s.310
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• pp.45-52
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• 2006

In his paper, we have developed the SMD(surface mounted device) type PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The VCXO wired with the PECL(positive emitter coupled logic) package take place a stray inductance and a parasitic capacitance by the length and the inner pattern of the VCXO and the amplitude attenuation and signal loss due to the reflection of power source and the noise component. We have developed the Zig system to analyze the precise spectrum and evaluate the performance. The basic operating voltage is the 3.3 V and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.42 no.1
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• pp.23-31
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• 2005

Recently, the multimedia and high speed telecommunication systems needs a high frequency and high stability oscillator. The VCXO(voltage controlled -crystal oscillator) have continually downsized to gratify a thin and small size of the telecommunication systems. In his paper, we have developed the small ceramic PECL(positive emitter-coupled logic) VCXO of the 5×7 mm size for gratifying the requested specifications from user, and then use the multilayer ceramic SMD(surface mounted device) package technology. The ceramic SMD PECL VCXO is operating at the 3.3 Voltage and have the frequency range of 120MHz～180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.95-101
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• 2008

We have used diversely the multilayer ceramic oscillator of the SMD(Surface Mounted Device) package technology that connects the crystal with the chip package. Such an oscillator occurs a stray inductance and a parasitic capacitance by the length and inner pattern. And it has been happened an amplitude attenuation and signal loss due to the reflection of power source and noise component. So we don't evaluate the precise performance of the oscillator for these factors. In this paper we have developed the Jig system to evaluate the performance of the oscillator. Through this system, we will expect an advanced performance of the oscillator and redesign an oscillator of the low jitter characteristics and low phase noise.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2A
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• pp.107-113
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• 2005

In this paper, we have developed the miniature ceramic PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The ceramic SMD PECL VCXO designed by the inverted Mesa type HFF is operating at the 3.3 Voltage and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.55-65
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• 2020

The use of underfill materials in semiconductor packages is not only important for stress relieving of the package, but also for improving the reliability of the package during shock and vibration. However, in recent years, as the size of the package becomes larger and very thin, the use of the underfill shows adverse effects and rather deteriorates the reliability of the package. To resolve these issues, we developed the package using a solid epoxy material to improve the reliability of the package as a substitute for underfill material. The developed solid epoxy was applied to the package of the application processor in smart phone, and the reliability of the package was evaluated using thermal cycling reliability tests and numerical analysis. In order to find the optimal solid epoxy material and process conditions for improving the reliability, the effects of various factors on the reliability, such as the application number of solid epoxy, type of PCB pad, and different solid epoxy materials, were investigated. The reliability test results indicated that the package with solid epoxy exhibited higher reliability than that without solid epoxy. The application of solid epoxy at six locations showed higher reliability than that of solid epoxy at four locations indicating that the solid epoxy plays a role in relieving stress of the package, thereby improving the reliability of the package. For the different types of PCB pad, NSMD (non-solder mask defined) pad showed higher reliability than the SMD (solder mask defined) pad. This is because the application of the NSMD pad is more advantageous in terms of thermomechanical stress reliability because the solderpad bond area is larger. In addition, for the different solid epoxy materials with different thermal expansion coefficients, the reliability was more improved when solid epoxy having lower thermal expansion coefficient was used.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.367-370
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• 2016

QFN(Quad Flat No-leads package) is one of the SMD(Surface Mount Device). Since there is no lead in QFN, there are many defects on solder. Therefore, we propose an efficient mechanism for QFN solder defect detection at this paper. For this, we employ Convolutional Neural Network(CNN) of the Machine Learning algorithm. QFN solder's color multi-layer images are used to train CNN. Since these images are 3-channel color images, they have a problem with applying to CNN. To solve this problem, we used each 1-channel grayscale image(Red, Blue, Green) that was separated from 3-channel color images. We were able to detect QFN solder defects by using this CNN. Later, further research is needed to detect other QFN.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.221-221
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• 2006

The SMD type P-N junction diode with ceramic package for diode case were fabricated. It was made this diode with simple process from $Al_2O_3$ ceramic chip, solder preform, diode chip, coating reagent and conductive paste for chip terrmination. Its merit is small size, easy manufacture. fast cooling with ceramic case. The electric characteristics of the diode such as reverse recovery time, breakdown voltage, forward voltage, and leakage current were 5 28ns, 1322V, 1.08V, $0.45{\mu}A$.

• ETRI Journal
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• v.39 no.6
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• pp.866-873
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• 2017

We propose a multilayered-substrate-based power semiconductor discrete device package for a low switching loss and high heat dissipation. To verify the proposed package, cost-effective, low-temperature co-fired ceramic, multilayered substrates are used. A bare die is attached to an embedded cavity of the multilayered substrate. Because the height of the pad on the top plane of the die and the signal line on the substrate are the same, the length of the bond wires can be shortened. A large number of thermal vias with a high thermal conductivity are embedded in the multilayered substrate to increase the heat dissipation rate of the package. The packaged silicon carbide Schottky barrier diode satisfies the reliability testing of a high-temperature storage life and temperature humidity bias. At $175^{\circ}C$, the forward current is 7 A at a forward voltage of 1.13 V, and the reverse leakage current is below 100 lA up to a reverse voltage of 980 V. The measured maximum reverse current ($I_{RM}$), reverse recovery time ($T_{rr}$), and reverse recovery charge ($Q_{rr}$) are 2.4 A, 16.6 ns, and 19.92 nC, respectively, at a reverse voltage of 300 V and di/dt equal to $300A/{\mu}s$.

• 한국노년학
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• v.37 no.2
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• pp.431-444
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• 2017

This study identified effect size of cognition improvement programs developed for normal elderly in Korea. By searching four databases, 9,624 studies published from 2000 to 2016 were identified. Finally, 14 studies which satisfied the inclusion criteria were selected for meta-analysis. Quality assessment of included studies was conducted using controlled trial checklist of Scottish Intercollegiate Guidelines Network. R version 3.3.2 (2016-10-31) with "meta" and "metafor" package was used to calculate effect sizes, identify the reasons of heterogeneity, and check publication bias. Total effect size of cognition improvement program was middle (SMD=0.759, p<.001, $I^2=34%$). For heterogeneity, moderator analysis was executed and combined program with exercise had the largest effect size (SMD=1.231, p<.001, $I^2=40.8%$). Publication bias was exist by funnel plot and Egger 's regression test, but trim and fill analysis showed that there was no serious error to reverse study results. Therefore, Combined program with exercise for the normal elderly was expected to improve the cognitive function of the normal elderly.