• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1123-1126
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• 2005

For creation of low temperature polycrystallinesilicon (LTPS) the line beam excimer laser annealing (ELA) is a well known and established technique in mass production. With introduction of Sequential Lateral Solidification (SLS) some aspects such as crystalline quality, throughput and flexibility regarding the substrate size could be improved, but for OLED manufacturing still further process development is necessary. This paper discusses line beam ELA and SLS techniques that might enable process engineers to make polycrystalline-silicon (poly-Si) films with a high degree of uniformity and quality as required for system on glass (SOG) and active matrix organic light emitting displays (AMOLED). Equipment requirements are discussed and compared to previous standards. SEM images of process examples are shown in order to demonstrate the viability.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.683-685
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• 2003

We report on a surface planarization process that produces more planar surface than previous sequential lateral solidification crystallized poly silicon films. By applying the single shot laser irradiation with optimum energy density ($(817mJ/cm^{2})$ on the ridge area after SLS crystallization, the ridge height can be decreased.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.1-4
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• 2008

The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

• Journal of Magnetics
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• v.21 no.1
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• pp.35-39
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• 2016

$Cr_{100-x}Ti_x$ amorphous texture-inducing layers (TIL) were investigated to realize highly (002) oriented $L1_0$ FePt-C granular films through hetero-epitaxial growth on the (002) textured bcc-$Cr_{80}Mn_{20}$ seed layer (bcc-SL). As-deposited TILs showed the amorphous phase in Ti content of $30{\leq}x(at%){\leq}75$. Particularly, films with $40{\leq}x{\leq}60$ kept the amorphous phase against the heat treatment over $600^{\circ}C$. It was found that preference of the crystallographic texture for bcc-SLs is directly affected by the structural phase of TILs. (002) crystallographic texture was realized in bcc-SLs deposited on the amorphous TILs ($40{\leq}x{\leq}70$), whereas (110) texture was formed in bcc-SLs overlying on crystalline TILs (x < 30 and x > 70). Correlation between the angular distribution of (002) crystal orientation of bcc-SL evaluated by full width at half maximum of (002) diffraction (FWHM) and a grain diameter of bcc-SL indicated that while the development of the lateral growth for bcc-SL grain reduces FWHM, crystallization of amorphous TILs hinders FWHM. $L1_0$ FePt-C granular films were fabricated under the substrate heating process over $600^{\circ}C$ with having different FWHM of bcc-SL. Hysteresis loops showed that squareness ($M_r/M_s$) of the films increased from 0.87 to 0.95 when FWHM of bcc-SL decreased from $13.7^{\circ}$ to $3.8^{\circ}$. It is suggested that the reduction of (002) FWHM affects to the overlying MgO film as well as FePt-C granular film by means of the hetero-epitaxial growth.

• Proceedings of the KIEE Conference
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• 2000.11c
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• pp.461-463
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• 2000

This paper presents a low temperature excimer-laser-crystallization that produces directionally solidified microstructure in Si thin films. The process involves (1) a complete melting of selected area via irradiation through a patterned mask. and (2) a precisely controlled pulse translation of the sample with respect to the mask over a distance shorter than the superlateral growth(SLG) distance. (3) lateral growth extended over a number of iterative steps. Grains that grow continuously to the vertical direction were demonstrated. We discuss sequential lateral solidification principle, experiment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.19-19
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• 2007

Excimer laser annealing (ELA) 방법을 이용하여 결정화하고 게이트 절연체로써 high-k 물질을 가지는 다결정 실리콘박막 트랜지스터의 전기적 특성을 평가하였다. 다결정 실리콘 박막 트랜지스터는 비결정질 실리콘 박막 트랜지스터 보다 높은 전계 효과 이동도와 운전 용이한 장점을 가진다. 기존의 결정화 방법으로는 다결정 실리콘 박막 트랜지스터의 높은 열 공급을 피할 수 없기 때문에, 매몰 산화막 위의 비결정질 박막은 저온에서 다결정 실리콘 결정화를 위해 KrF excimer laser (248nm)를 이용하여 가열 냉각 공정을 했다. 게다가 케이트 절연체로써 atomic layer deposition (ALD) 방법에 의해 저온에서 20 nm의 고 유전율을 가지는 $HfO_2$ 박막을 증착하였다. 알루미늄은 n-MOS 박막 트랜지스터의 게이트 전극으로 사용되었다. 금속 케이트 전극을 사용하여 게이트 공핍 효과와 관계되는 케이트 절연막 두께의 증가를 예방할 수 있고, 게이트 저항의 감소에 의해 소자 속도를 증가 시킬 수 있다. 추가적으로, 비결정질 실리콘 박막의 결정화 기술로써 사용된 ELA 방법은 SPC (solid phase crystallization) 방법과 SLS (sequential lateral solidification) 방법에 의해 비교되었다. 결과적으로, ELA 방법에 의해 결정화된 다결정 실리콘 박막의 결정도와 표면 거칠기는 SPC와 SLS 방법에 비해 개선되었다. 또한, 우리는 ELA 결정화 방법에 의한 다결정 실리콘 박막 트랜지스터로부터 우수한 소자 특성을 얻었다.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1416-1417
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• 2011

킹크효과를 억제할 수 있는 새로운 f-모양 트리플게이트 구조를 가지는 다결정실리콘 박막트랜지스터는 추가적인 공정과정 없이 제안 및 제작되었다. 이러한 다결정실리콘 박막트랜지스터의 채널에는 순차적인 횡방향 고체화(Sequential Lateral Solidification, SLS)나 CW 레이져 횡방향 결정화(CW laser Lateral Crystallization, CLC) 등과 같은 방법으로 제작된 횡방향으로 성장시킨 그레인이 있다. 이 소자의 전체적인 전류흐름은 횡방향으로 성장시킨 그레인 경계에 강력하게 영향을 받는다. f-모양 트리플게이트에는 횡방향으로 성장시킨 그레인과 평행한 방향으로 위치한 채널, 그리고 수직인 방향으로 위치한 채널이 있다. 이 소자는 f-모양 게이트 구조에서의 비대칭 이동도를 이용하여 다결정실리콘 박막트랜지스터의 킹크효과를 효과적으로 억제시킬 수 있다는 사실을 실험과 시뮬레이션을 통해 검증되었다. 우리의 실험 결과는 이 논문에서 제안된 f-모양 트리플게이트 박막트랜지스터가 기존의 박막트랜지스터와 비교할 때 더 효과적으로 킹크 효과를 감소시킬 수 있다는 것을 보여주었다. 또한 고온 캐리어 스트레스 조건에서의 신뢰성도 개선할 수 있음이 확인되었다.