• Title/Summary/Keyword: SHA

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The design of high-accuracy CMOS sampel-and-hold amplifiers (고정밀 CMOS sample-and-hold 증폭기 설계 기법 및 성능 비교)

  • 최희철;장동영;이성훈;이승훈
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.6
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    • pp.239-247
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    • 1996
  • The accuracy of sample-and-hold amplifiers (SHA's) empolying a CMOS process in limited by nonideal factors such as linearity errors of an op amp and feedthrough errors of switches. In this work, after some linearity improvement techniques for an op amp are discussed, three different SHA's for video signal processing are designed, simulated, and compared. The CMOS SHA design techniques with a 12-bit level accuracy are proposed by minimizing cirucit errors based on the simulated results.

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Practical (Second) Preimage Attacks on the TCS_SHA-3 Family of Cryptographic Hash Functions

  • Sekar, Gautham;Bhattacharya, Soumyadeep
    • Journal of Information Processing Systems
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    • v.12 no.2
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    • pp.310-321
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    • 2016
  • TCS_SHA-3 is a family of four cryptographic hash functions that are covered by a United States patent (US 2009/0262925). The digest sizes are 224, 256, 384 and 512 bits. The hash functions use bijective functions in place of the standard compression functions. In this paper we describe first and second preimage attacks on the full hash functions. The second preimage attack requires negligible time and the first preimage attack requires $O(2^{36})$ time. In addition to these attacks, we also present a negligible time second preimage attack on a strengthened variant of the TCS_SHA-3. All the attacks have negligible memory requirements. To the best of our knowledge, there is no prior cryptanalysis of any member of the TCS_SHA-3 family in the literature.

Design and Implementation of HMAC-SHA-1 Hardware Module for IPv6 Security System (IPv6보안시스템용 HMAC-SHA-1하드웨어 모듈의 설계 및 구현)

  • 김지욱;이정태
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.10e
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    • pp.277-279
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    • 2002
  • 전자상거래, 무선 인터넷 등의 활성화를 위해서는 신뢰성 있는 통신 서비스를 제공하는 IPv6용 보안시스템이 필요하다. 이를 위한 기존의 암호화 알고리즘은 소프트웨어 및 하드웨어로 많이 구현되어 있으나 IPv4를 기반으로 한 운영체제에 종속되어 있다. 이를 해결하기 위하여 운영체제 없이 고성능의 보안서비스를 제공하는 IPv6용 보안시스템이 하드웨어로 구현되었다. 본 논문에서는 이러한 IPv6용 하드웨어 보안시스템에 요구되는 암호화알고리즘 중에서 HMAC-SHA-1을 하드웨어 모듈로 구현하였다. 그리고 구현한HMAC-SHA-1 모듈에 대하여 시뮬레이션 테스트를 수행하고 IPv6 하드웨어 보안시스템과 연동함으로써 기능을 검증하였다.

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Performance Evaluation of Cryptographic Algorithms for the 6LoWPAN with Packet Fragmentations (6LoWPAN 단편화 패킷 재전송에 따른 암호화 알고리즘 성능 분석)

  • Kim, Hyun-Gon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.8
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    • pp.77-84
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    • 2011
  • In this paper we implement a 6LoWPAN protocol on the MICAz sensor platform, which could minimize packet re-transmission, and support security primitives for packet integrity and confidentiality. And we also present a performance evaluation of the implemented protocol calculated according to the cryptographic algorithms. In the re-transmission method, time stamp, nonce, and checksum are considered to protect replay attacks. As cryptographic algorithms, AES, 3DES, SHA2, and SHA1 are implemented. If transmission errors (thus, packet losses) and the number of hops are increase then, packet re-transmissions are increase exponentially from the experimental results. Also, the result shows that cryptographic operations take more time than packet re-transmission time.

An IPSO-KELM based malicious behaviour detection and SHA256-RSA based secure data transmission in the cloud paradigm

  • Ponnuviji, N.P.;Prem, M. Vigilson
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.11
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    • pp.4011-4027
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    • 2021
  • Cloud Computing has emerged as an extensively used technology not only in the IT sector but almost in all sectors. As the nature of the cloud is distributed and dynamic, the jeopardies present in the current implementations of virtualization, numerous security threats and attacks have been reported. Considering the potent architecture and the system complexity, it is indispensable to adopt fundamentals. This paper proposes a secure authentication and data sharing scheme for providing security to the cloud data. An efficient IPSO-KELM is proposed for detecting the malicious behaviour of the user. Initially, the proposed method starts with the authentication phase of the data sender. After authentication, the sender sends the data to the cloud, and the IPSO-KELM identifies if the received data from the sender is an attacked one or normal data i.e. the algorithm identifies if the data is received from a malicious sender or authenticated sender. If the data received from the sender is identified to be normal data, then the data is securely shared with the data receiver using SHA256-RSA algorithm. The upshot of the proposed method are scrutinized by identifying the dissimilarities with the other existing techniques to confirm that the proposed IPSO-KELM and SHA256-RSA works well for malicious user detection and secure data sharing in the cloud.

Comparative analysis of quantum circuit implementation for domestic and international hash functions (국내·국제 해시함수에 대한 양자회로 구현 비교 분석)

  • Gyeong Ju Song;Min Ho Song;Hwa Jeong Seo
    • Smart Media Journal
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    • v.12 no.2
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    • pp.83-90
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    • 2023
  • The advent of quantum computers threatens the security of existing hash functions. In this paper, we confirmed the implementation results of quantum circuits for domestic/international hash functions, LSH, SHA2, SHA3 and SM3, and conducted a comparative analysis. To operate the existing hash function in a quantum computer, it must be implemented as a quantum circuit, and the quantum security strength can be confirmed by estimating the necessary quantum resources. We compared methods of quantum circuit implementation and results of quantum resource estimation in various aspects and discussed ways to meet quantum computer security in the future.

EC-DSA Implementation using Security SoC with built-in ECC Core (ECC 코어가 내장된 보안 SoC를 이용한 EC-DSA 구현)

  • Yang, Hyeon-Jun;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.05a
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    • pp.63-65
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    • 2021
  • This paper describes an integrated H/W-S/W implementation of elliptic curve digital signature algorithm (EC-DSA) using a security system-on-chip (SoC). The security SoC uses the Cortex-A53 APU as CPU, and the hardware IPs of high-performance elliptic curve cryptography (HP-ECC) core and SHA3 (secure hash algorithm 3) hash function core are interfaced via AXI4-Lite bus protocol. The signature generation and verification processes of EC-DSA were verified by the implementation of the security SoC on a Zynq UltraScale+ MPSoC device.

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Research Trend about Quantum Circuit Implementation for SHA2 (양자 회로 상에서의 SHA2 구현 동향)

  • Se-Jin, Lim;Kyung-Bae Jang;Yu-Jin Yang;Yu-Jin Oh;Hwa-Jeong Seo
    • Proceedings of the Korea Information Processing Society Conference
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    • 2023.05a
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    • pp.227-229
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    • 2023
  • 양자컴퓨터는 큐비트(qubit)의 얽힘(entanglement)과 중첩(superposition) 성질을 통해 동시에 연산을 수행할 수 있어 고전컴퓨터에 비해 연산 속도가 획기적으로 빠르다. 전수조사 연산을 매우 빠르게 수행할 수 있는 양자 알고리즘인 Grover 알고리즘을 사용하면, n-bit 보안강도를 가지는 SHA2와 같은 해시함수를 n/2-bit 보안강도로 낮추게 되어 해시함수가 적용되는 분야의 보안을 위협하게 된다. 양자컴퓨터를 통한 해킹에는 많은 양자 자원이 요구되고, 안정적인 구동 환경이 갖춰져야 하기 때문에 실현되기 위해서는 아직까지 상당한 시간이 소요될 것으로 보인다. 이에 연구자들은 필요한 양자 자원을 최소화하는 효율적인 양자 공격 회로를 제시하며 연구를 수행하고 있다. 본 논문에서는 이러한 SHA2 해시함수에 대한 양자 회로 구현 동향에 대해 살펴본다.

EFFECT OF XYLITOL ON BINDING OF ORAL BACTERIA TO SALIVA-COATED SURFACES (Xylitol이 구강세균의 부착에 미치는 영향에 관한 연구)

  • Choi, Hye-Jin;Choi, Ho-Young
    • Restorative Dentistry and Endodontics
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    • v.22 no.1
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    • pp.170-180
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    • 1997
  • Cariogenicity of the bacteria is attributed to their binding capacity to the teeth. Bacterial attachment to oral surfaces is an essential step for colonization and subsequently infection. Therefore, it is conceivable that caries prevention can be achieved fundamentally by inhibition of bacterial attachment. The rationale for caries prevention through the use of sugar substitutes or limited use of sugar has been revealed. Among many sugar substitutes, xylitol has been shown to exhibit the most profound cariostatic effect, inhibiting glucose metabolism and possibly binding of mutans streptococci. The purpose of this study was to examine the effect of xylitol on binding of different species of oral bacteria. The effect of xylitol on binding of [$^3H$]-labeled oral bacteria to hydroxyapatite coated with human saliva(SHA) as a model for the pellicle-coated tooth surfaces was investigated. The strains of oral bacteria used in this study were A. viscosus T14V, A. viscosus WVU627, P. gingivaiis 2561, P. gingivalis A7Al-28, S. gordonii G9B, S. gordonii Challis, S. sobrinus 6715, S. mutans UA101, S. mutans KPSK -2, S. mutans T8, and S. mutans UA130. The obtained results were as follows: 1. P. gingivalis A7 Al-28, S. mutans UA130, S. mutans T8 grown with xylitol showed greater binding to SHA than the organism grown without xylitol. Among these, S. mutans T8 showed the greatest rate of increase in its binding to SHA ; 8-fold increase in its binding with xylitol. 2. S. mutans KPSK -2 grown with xylitol showed 2 times lesser binding to SHA than the organism grown without xylitol. 3. Binding ability of the remaining strains grown with xylitol to SHA was almost same as that of the organisms grown without xylitol. The overall results suggest that use of xylitol in the oral cavity may affect the complex oral bacterial ecosystem.

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An 8b 200 MHz 0.18 um CMOS ADC with 500 MHz Input Bandwidth (500 MHz의 입력 대역폭을 갖는 8b 200 MHz 0.18 um CMOS A/D 변환기)

  • 조영재;배우진;박희원;김세원;이승훈
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.5
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    • pp.312-320
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    • 2003
  • This work describes an 8b 200 MHz 0.18 urn CMOS analog-to-digital converter (ADC) based on a pipelined architecture for flat panel display applications. The proposed ABC employs an improved bootstrapping technique to obtain wider input bandwidth than the sampling tate of 200 MHz. The bootstrapuing technique improves the accuracy of the input sample-and-hold amplifier (SHA) and the fast fourier transform (FFT) analysis of the SHA outputs shows the 7.2 effective number of bits with an input sinusoidal wave frequency of 500 MHz and the sampling clock of 200 MHz at a 1.7 V supply voltage. Merged-capacitor switching (MCS) technique increases the sampling rate of the ADC by reducing the number of capacitors required in conventional ADC's by 50 % and minimizes chip area simultaneously. The simulated ADC in a 0.18 um n-well single-poly quad-metal CMOS technology shows an 8b resolution and a 73 mW power dissipation at a 200 MHz sampling clock and a 1.7 V supply voltage.