• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.605-614
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• 2016

We develop a novel SAD circuit for power-efficient H.264 encoding, namely a-SAD. Here, some highest-order MSB's are approximated to single MSB. Our theoretical estimations show that our proposed design simultaneously improves performance and power of SAD circuit, achieving good power efficiency. We decide that the optimal number of approximated MSB's is four under 8-bit YUV-420 format, the largest number not to affect video quality and compression-rate in our video experiments. In logic simulations, our a-SAD circuit shows at least 9.3% smaller critical-path delay compared to existing SAD circuits. We compare power dissipation under iso-throughput scenario, where our a-SAD circuit obtains at least 11.6% power saving compared to other designs. We perform same simulations under two- and three-stage pipelined architecture. Here, our a-SAD circuit delivers significant performance (by 13%) and power (by 17% and 15.8% for two and three stages respectively) improvements.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.197-203
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• 2014

The safety and arming device(SAD), one of the components of the fuzes, shall provide safety that is consistent with handling, storage, transportation, use, and disposal. In this paper, we describes the design of the SAD which includes the solenoid assembly and the solenoid driving circuit to improve the safety of the fuzes. The solenoid assembly consists of a coil assembly, a restoring spring, and a core. The solenoid assembly is added in the SAD as an additional safety device. In case of the normal circumstances, the core of the solenoid assembly restrains the $1^{st}$ and $2^{nd}$ safety devices of the SAD for those devices not to operate at all, so that the SAD can secure safety for storage, transportation, and use. In contrast, when the battery power is provided to the solenoid driving circuit just before the flight, the core confirms the power level and starts removing the restraint from the $1^{st}$ and $2^{nd}$ safety devices of the SAD, and then the SAD is able to change its mode from safety mode to armed mode. After firing, once the SAD's operations complete, the turned-on arming switch stops providing the power to the solenoid assembly automatically. It can reduce the power consumption at solenoid assembly. Therefore, the proposed solenoid driving circuit for the solenoid assembly not only unlocks the restrained solenoid assembly from the safety devices, but also saves the power consumption during the flight.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.112-115
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• 2008

In this paper, we propose H.264 High Profile Encoder Intra Prediction module. This designed module can be operated in 306 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 13.2 and verified the our developed hardware using test vector generated by reference C. We adopt plan removal and SAD calculation to reduce the Hardware cost and cycle. The designed circuit can be operated in 133MHz clock system, and has 250K gate counts using TSMC 0.18um process including SRAM memory.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2045-2049
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• 2008

In this paper, we propose an novel architecture for H.264 High Profile Encoder Intra Prediction module. This designed module can be operated in 306 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 13.2 and verified the our developed hardware using test vector generated by reference C. We adopt plan removal and SAD calculation to reduce the Hardware cost and cycle. The designed circuit can be operated in 133MHz clock system, and has 250K gate counts using TSMC 0.18 um process including SRAM memory.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.5
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• pp.58-65
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• 2007

As multimedia portable devices become popular, the amount of computation for processing data including video compression has significantly increased. Various researches for low power consumption of the mobile devices and real time processing have been reported. Motion Estimation is responsible for 67% of H.264 encoder complexity. In this research, a new circuit is designed for motion estimation. The new circuit uses motion prediction based on approximate SAD, Alternative Row Scan (ARS), DAU, and FDVS algorithms. Our new method can reduce the amount of computation by 75% when compared to multi-frame motion estimation suggested in JM8.2. Furthermore, optimal number and size of reference frame blocks are determined to reduce computation without affecting the PSNR. The proposed Motion Estimation method has been verified by using the hardware and software Co-Simulation with iPROVE. It can process 30 CIF frames/sec at 50MHz.

• Journal of Broadcast Engineering
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• v.18 no.5
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• pp.669-679
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• 2013

This paper proposed a new VLSI (Very Large Scale Integrated Circuit) architecture for stereo matching in real time. We minimized the amount of calculation and the number of memory accesses through analyzing calculation of stereo matching. From this, we proposed a new stereo matching calculating cell and a new hardware architecture by expanding it in parallel, which concurrently calculates cost function for all pixels in a search range. After expanding it, we proposed a new hardware architecture to calculate cost function for 2-dimensional region. The implemented hardware can be operated with minimum 250Mhz clock frequence in FPGA (Field Programmable Gate Array) environment, and has the performance of 805fps in case of the search range of 64 pixels and the image size of $640{\times}480$.

• Corrosion Science and Technology
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• v.16 no.3
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• pp.91-99
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• 2017

The objective of this work was to develop efficient synergistic inhibitor combinations comprising sodium nitrite ($NaNO_2$) and an inhibitor-blend code named (SN-50), keeping in view of their application in industrial cooling water systems. The electrochemical characteristics of the carbon steel working electrode in simulated cooling water (SCW), without and with the addition of different combinations of the inhibitors, were investigated using electrochemical impedance spectroscopy (EIS), open circuit potential (OCP). The electrode surface changes were followed by visual characterization methods. It was demonstrated in this study that all the combinations of the inhibitors exhibited synergistic benefit and higher inhibition efficiencies than did either of the individual inhibitors. The addition of SN-50 inhibitor to the SCW shifted the OCP to more anodic values and increased the polarization resistance ($R_p$) values of carbon steel at all applied concentrations. The higher the applied sodium nitrite concentration (in the protection concentration range), the higher the obtained $R_p$ values and the inhibition efficiency improved by increasing the inhibitor concentration.