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An Efficient Motion Estimation Method which Supports Variable Block Sizes and Multi-frames for H.264 Video Compression  

Yoon, Mi-Sun (Electronic Engineering and Computer Science, Hanyang University)
Chang, Seung-Ho (Electronic Engineering and Computer Science, Hanyang University)
Moon, Dong-Sun (Electronic Engineering and Computer Science, Hanyang University)
Shin, Hyun-Chul (Electronic Engineering and Computer Science, Hanyang University)
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Abstract
As multimedia portable devices become popular, the amount of computation for processing data including video compression has significantly increased. Various researches for low power consumption of the mobile devices and real time processing have been reported. Motion Estimation is responsible for 67% of H.264 encoder complexity. In this research, a new circuit is designed for motion estimation. The new circuit uses motion prediction based on approximate SAD, Alternative Row Scan (ARS), DAU, and FDVS algorithms. Our new method can reduce the amount of computation by 75% when compared to multi-frame motion estimation suggested in JM8.2. Furthermore, optimal number and size of reference frame blocks are determined to reduce computation without affecting the PSNR. The proposed Motion Estimation method has been verified by using the hardware and software Co-Simulation with iPROVE. It can process 30 CIF frames/sec at 50MHz.
Keywords
H.264 encoder; Video compression; Motion estimation; Absolute Difference; FPGA;
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