• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.87-90
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• 2007

VIATRON TECHNOLOGIES has developed an $\underline{A}$tmospheric $\underline{M}$etal $\underline{D}$oping (AMD) system which uniformly dopes metal species onto a substrate. The AMD system injects metal-organic vapor over substrate using an injection head with a scan motion. One of important application of this system is a metalinduced crystallization of amorphous Si for manufacturing AMOLED poly-Si panels. The AMD system with a use of Ni vapor source produces doping of trace amount of Ni onto amorphous Si, enabling uniform MIC crystallization. Also, the operation without vacuum condition offers advantages such as easy maintenance, low cost production, and large glass processes.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.107-117
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• 2010

An analytical subthreshold swing model is presented for symmetric double-gate (DG) MOSFETs with Gaussian doping profile in vertical direction. The model is based on the effective conduction path effect (ECPE) concept of uniformly doped symmetric DG MOSFETs. The effect of channel doping on the subthreshold swing characteristics for non-uniformly doped device has been investigated. The model also includes the effect of various device parameters on the subthreshold swing characteristics of DG MOSFETs. The proposed model has been validated by comparing the analytical results with numerical simulation data obtained by using the commercially available $ATLAS^{TM}$ device simulator. The model is believed to provide a better physical insight and understanding of DG MOSFET devices operating in the subthreshold regime.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1131-1134
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• 2003

A low temperature doping technique has been studied for application in poly-Si TFT's on plastic substrates. Heavily-doped amorphous silicon layers were deposited on poly-Si and the dopant atoms were driven in by subsequent excimer laser annealing. The entire process was carried out under a substrate temperature of $120^{\circ}C$, and a sheet resistance as low as $300 {\Omega}/sq$. was obtained.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.93-93
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• 1998

III-V족 질화물반도체를 이용한 광 및 전자소자 용용에 있어서 가장 중요한 고홈위 u undoped GaN 에피충 성장과 GaN 에피충의 doping 특허 p-type doping의 복성융 고찰한다. 그리고 III-V nitride 이용한 band gap en명neertng에 있어서 가장 중요한 InGaN 생장파 81 및 :at codoplng 륙성융 평가 분석 한다. 위의 기반기술융 기본으로 하여 InGaN/AlG때 DH s$\sigma$ucture lED훌 제작하고 이의 륙성 용 명가분석하였다.

• 한국초전도학회:학술대회논문집
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• v.12
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• pp.4-4
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• 2002

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1216-1219
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• 2009

Recently,electroluminescence devices based on organic semiconductors have made considerable progress. Displays based on organic light emitting diodes (OLED) are commercially available. To gain broader acceptance, the performance of OLED devices has to be further improved, in particular for lighting. This article discusses the possibility to use controlled electrical doping for improving the properties of devices and new approaches for highly efficient white OLED.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.1709-1711
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• 2004

3,4-ethylenedioxythiophene(EDOT)을 ferric-toluenesulfonate(FTS)로 doping하여 합성하였다. 이때 다양한 유기용매를 함께 첨가하여 합성하였고, 온도에 따른 각각의 DC 전도도를 측정하였다. FTS로 dofing된 poly(3,4-ethylenedioxythiophene) (PEDOT)는 3-D variable range hopping model을 잘 따르며, alcohol류의 용매와 함께 합성한 경우는 상온의 DC 전도도가 2 S/cm로 0.4 S/cm의 reference 보다 전기전도를 증가시키는 반면, ketone류는 약 $10^{-11}$ S/cm로 전기전도를 감소시키는 경향을 보였다. 전도도의 증감과 doping level의 관계를 규명하기 위하여 X-ray 분석을 하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.291.1-291.1
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• 2016

Graphene by one of the two-dimensional (2D) materials has been focused on electronic applications due to its ultrahigh carrier mobility, outstanding thermal conductivity and superior optical properties. Although graphene has many remarkable properties, graphene devices have low on/off current ratio due to its zero bandgap. Despite considerable efforts to open its bandgap, it's hard to obtain appropriate improvements. To solve this problem, heterojunction barristor was proposed based on graphene. Mostly, this heterojunction barristor is made by transition metal dichalcogenides (TMDs), such as molybdenum disulfide ($MoS_2$) and tungsten diselenide ($WSe_2$), which have extremely thickness scalability of TMDs. The heterojunction barristor has the advantage of controlling graphene's Fermi level by applying gate bias, resulting in barrier height modulation between graphene interface and semiconductor. However, charged impurities between graphene and $SiO_2$ cause unexpected p-type doping of graphene. The graphene's Fermi level modulation is expected to be reduced due to this p-doping effect. Charged impurities make carrier mobility in graphene reduced and modulation of graphene's Fermi level limited. In this paper, we investigated theoretically and experimentally a relevance between graphene's Fermi level and p-type doping. Theoretically, when Fermi level is placed at the Dirac point, larger graphene's Fermi level modulation was calculated between -20 V and +20 V of $V_{GS}$. On the contrary, graphene's Fermi level modulation was 0.11 eV when Fermi level is far away from the Dirac point in the same range. Then, we produced two types heterojunction barristors which made by p-type doped graphene and graphene treated 2.4% APTES, respectively. On/off current ratio (32-fold) of graphene treated 2.4% APTES was improved in comparison with p-type doped graphene.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.424-425
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• 2006

Zinc sulfide is a well-known host material of phosphor emitting different radiations dependent on different doping impurities of metallic ion. It emits green, blue, orange-yellow or white colors by doping with activators such as copper, silver, manganese and so on. In this study, manganese, copper and chlorine doped ZnS phosphor (ZnS:Mn,Cu,Cl) was synthesized by solid-state reaction method. The optical properties were investigated according to different concentrations of sulfur and activators used during the synthesis process.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.192-198
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• 2017

In this paper, we propose a novel double gate vertical channel tunneling field effect transistor (DVTFET) with a dielectric sidewall and optimization characteristics. The dielectric sidewall is applied to the gate region to reduced ambipolar voltage ($V_{amb}$) and double gate structure is applied to improve on-current ($I_{ON}$) and subthreshold swing (SS). We discussed the fin width ($W_S$), body doping concentration, sidewall width ($W_{side}$), drain and gate underlap distance ($X_d$), source doping distance ($X_S$) and pocket doping length ($X_P$) of DVTFET. Each of device performance is investigated with various device parameter variations. To maximize device performance, we apply the optimum values obtained in the above discussion of a optimization simulation. The optimum results are steep SS of 32.6 mV/dec, high $I_{ON}$ of $1.2{\times}10^{-3}A/{\mu}m$ and low $V_{amb}$ of -2.0 V.