• Journal of the Korean Institute of Intelligent Systems
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• v.7 no.1
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• pp.34-44
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• 1997

The Belgian Nuclear Research Centre(SCK${\cdot}$CEN) has been a pioneer of the peaceful uses of nuclear energy after over forty years of existence. Recently, SCK${\cdot}$CEN's financial support of doctoral and postdoctoral research in close collaboration with universities has been a vital ingredient for securing a quality profile committed to the pursuit of execllence. FLINS, Fuzzy Logic and Intelligent technologies in Nuclear Science, was initially built within one of the postdoctoral research project at SCK${\cdot}$CEN. Among SCK${\cdot}$CEN's activities which will have an important impact on its scientific future, the application of fuzzy logic and intelligent technologies in nuclear science and engineering opens new domains in radiation protection, safety assessment, human reliability, nuclear reactor control, waste and disposal, etc. In this paper, we review the available literature on fuzzy logic in nuclear applications. We then present the initiative of R&D on fuzzy logic applications at SCK${\cdot}$CEN, namely, (1) safety control for a nuclear reactor, and (2) a safety evaluation model for nuclear transmission lines. By these two examples of nuclear applications, we illustrate the potential use of fuzzy logic in nuclear safety issues.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2281-2283
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• 1998

In this paper, we propose a digital differential protection of power transformer using intelligent schemes. Intelligent schemes is based on fuzzy logic and neural networks. To enhance the distinction between fault and inrush of conventional approaches, relaying technique by fuzzy logic and neural networks are used. We used transformer inrush currents, external and internal fault signals, which are obtained from EMTP simulation.

• Korean Journal of Remote Sensing
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• v.21 no.2
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• pp.145-162
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• 2005

To improve the accuracy of land-cover discrimination in SAB data classification, this paper presents a methodology that includes feature extraction and fusion steps with multi-temporal SAR data. Three features including average backscattering coefficient, temporal variability and coherence are extracted from multi-temporal SAR data by considering the temporal behaviors of backscattering characteristics of SAR sensors. Dempster-Shafer theory of evidence(D-S theory) and fuzzy logic are applied to effectively integrate those features. Especially, a feature-driven heuristic approach to mass function assignment in D-S theory is applied and various fuzzy combination operators are tested in fuzzy logic fusion. As experimental results on a multi-temporal Radarsat-1 data set, the features considered in this paper could provide complementary information and thus effectively discriminated water, paddy and urban areas. However, it was difficult to discriminate forest and dry fields. From an information fusion methodological point of view, the D-S theory and fuzzy combination operators except the fuzzy Max and Algebraic Sum operators showed similar land-cover accuracy statistics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.121-126
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• 2007

This paper describes a 9.09 Gb/s CMOS demultiplexer using redundant multi-valued logic (RMVL). The proposed circuit receives serial binary data and is converted to parallel redundant multi-valued data using RMVL. The converted data are reconverted to parallel binary data. By the redundant multi-valued data conversion, the RMVL makes it possible to achieve higher operating speeds than that of a conventional binary logic. The implemented demultiplexer consists of eight integrators. Each integrator is composed of an accumulator, a window comparator, a decoder and a D flip flop. The demultiplexer is designed with Samsung $0.35{\mu}m$ standard CMOS process. The validity and effectiveness are verified through the post layout simulation. The demultiplexer is achieved the maximum data rate of 9.09 Gb/s and the average power consumption of 69.93 mW. This circuit is expected to operate at higher speed than 9.09 Gb/s in the deep-submicron process of the high operating frequency.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.1358-1361
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• 1993

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.50 no.3
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• pp.138-144
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• 2001

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.52-58
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• 2006

Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.154-161
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• 2006

This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

• Transactions of the Korean Society of Automotive Engineers
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• v.2 no.5
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• pp.23-29
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• 1994

The design procedure for fuzzy logic controller depends on the expert's knowledge or trial and error. Moreover, it is very difficult to guarantee the stability and robustness of the system due to the linguistic expression of fuzzy control. However, fuzzy logic control has succeeded in many control problems that the conventional control theory has difficulties to deal with. As a result, this control theory is applied to the engine control system which a mathematical model is difficult. In this study, the fuzzy logic is applied to obtain the gain of PI control at idle speed control system, and a simple engine model is developed in order to perform simulation. Experimental results show that the response to reach the target engine speed at idle speed control system is improved by adopting the gain obtained with fuzzy logic.

• Korean Journal of Logic
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• v.16 no.2
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• pp.189-231
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• 2013

The purpose of this paper is to show that Williamson's counterexamples and Fara's paradox do not conclusively refute supervaluationism. I will achieve this purpose on the basis of local validity. In general, people regard supervaluational validity as global validity. And D-introduction, which is premise of Williamson's counterexamples and Fara's paradox, is justified only if we assume global validity. But it cannot correctly grasp supervaluational semantics, especially semantic character of D-operator. So I will show that validity of supervaluationism is local and define global validity by local validity. Strategy of this paper is to protect supervaluationism against Williamson's counterexamples and Fara's paradox by minimal modification of supervaluationism and to prove that supervaluational logic is not revisionary and weak for solving the sorites paradox.