• 전자공학회논문지 IE
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• v.45 no.3
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• pp.5-12
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• 2008

We propose efficient scan testing method capable of reducing the test data and power dissipation for digital logic circuits. The proposed testing method is based on a hybrid run-length encoding which reduces test data storage on the tester. We also introduce modified Bus-invert coding method and scan cell design in scan cell reordering, thus providing increased power saving in scan in operation. Experimental results for ISCAS'89 benchmark circuits show that average power of 96.7% and peak power of 84% are reduced on the average without fault coverage degrading. We have obtained a high reduction of 78.2% on the test data compared the existing compression methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1559-1565
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• 1997

A new multitrack RLL codes with immunity to intertrack interference (ITI) is proposed. This code takes aim at a high density storage channels by reducing the track width and/or guard bands between tracks since it prevents transition in neighboring tracks at the same time epoch. The capacities of the codes are found for each maximum and minimum constraint pair.

• Journal of The Korean Astronomical Society
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• v.27 no.1
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• pp.13-29
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• 1994

We have constructed a 3-dim hydrodynamics code called BTSPH. The fluid dynamics part of the code is based on the smoothed particle hydrodynamics (SPH), and for its Poisson solver the binary tree (BT) scheme is employed. We let the smoothing length in the SPH algorithm vary with space and time, so that resolution of the calculation is considerably enhanced over the version of SPH with fixed smoothing length. The binary tree scheme calculates the gravitational force at a point by collecting the monopole forces from neighboring particles and the multipole forces from aggregates of distant particles. The BTSPH is free from geometric constraints, does not rely on grids, and needs arrays of moderate size. With the code we have run the following set of test calculations: one-dim shock tube, adiabatic collapse of an isothermal cloud, small oscillation of an equilibrium polytrope of index 3/2, and tidal encounter of the polytrope and a point mass perturber. Results of the tests confirmed the code performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.2074-2079
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• 1997

Much recent work has been done in the two related areas of source coding for data compression, and channel coding for data storage, respectively. We propose two (0, k) run-lengh limited(RLL) data compression codes for the storage that combine source and channel coding. It was shown that the propsoed codes approach the maximum code rate of (0, k) code as k increase. Thus, the overall code rate of storage system can be increased by using the combined source/channel coding as compared to the conventional 8/9 code which is popular in hard drive systems Functhermore, one can also reduce the complexity of modulation coding procedure by using already RLL constrained data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3C
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• pp.77-82
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• 2005

Partial response maximum likelihood (PRML) detection using the Viterbi algorithm involves the calculation of likelihood metrics that determine the most likely sequence of decoded data. In general, it is assumed that branches at each node in the trellis diagram have same probabilities. If modulation code with minimum and maximum run-length constraints is used, the occurrence ratio (Ro) of each particular pattern is different, and therefore the assumption is not true. We present a calculation scheme of the likelihood metrics for the PRML detection using the occurrence ratio. In simulation, we have tested the two (1,7) run-length-limited codes and calculated the occurrence ratios as the orders of PR targets are changed. We can identify that the PRML detections using the occurrence ratio provide more than about 0.5dB gain compared to conventional PRML detections at 10/sup -5/ BER in high-density magnetic recording and optical recording channels.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.49 no.1
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• pp.8-11
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• 2012

Automated Vision Inspection (AVI) systems automatically detect any defect feature in a surface image. The performance of the system can be measured under a special circumstances such as ultimate defect detection. In this situation, the defect signal level is similar to noise level and it becomes hard to make a solid decision with AVI systems. In this paper, we propose an effective preprocessing technique to enhance SNR (Signal to Noise Ratio). The method is motivated by some principles of HVS (Human Visual System) and RLC (Run Length Coding) techniques is used for this purpose. The proposed preprocessing technique enhances SNR under ultimate defect conditions and improves overall performance of AVI system.

• Journal of the Korea Society of Computer and Information
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• v.4 no.1
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• pp.1-6
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• 1999

In this paper We propose the new lossless compression method which use Huffman Coding using the preprocessing to compress the still image. The proposed methode divide into two parts according to activity of the image. If activities are high, the original Huffman Coding method was used directly. IF activities are low, the nibble run-length coding and the bit dividing method was used. The experimental results show that compression rate of the proposed method was better than the general Huffman Coding method.

• Journal of Satellite, Information and Communications
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• v.9 no.3
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• pp.116-120
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• 2014

Visible Light Communication is one of the promising technologies for wireless communication due to the possibility to use existing LED lightening infrastructure to transmit data. LED has the ability to turn on and off very fast enough that our human eyes can't recognize so it can be used to transmit data via visible light along with illumination. But it faces flicker problem due to the brightness discrepancies between '1' and '0' bit patterns inside a data frame. Various run length limited (RLL) coding scheme like Manchester code, 4B6B, 8B10B or VPPM can be used to solve flickering problem. So we propose pseudo Manchester codding which can transmit data without modifying LED modulator and demodulator circuit as well as solve flickering problem.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.7
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• pp.1485-1490
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• 2005

Variable length code is an integral component of many international standards on image and video compression currently. Context-based Adaptive Variable Length Coding(CAVLC) is adopted by the emerging JVT(also called H.264, and AVC in MPEG-4). In this paper, we design an architecture for CAVLC encoder, including a coeff_token encoder, level encoder, total_zeros encoder and run_before encoder. The designed CAVLC encoder can encode one syntax element in one clock cycle. As a result of implementation by Vertex-1000e of Xilinx, its operation frequency is 68MHz. Therefore, it is very suitable for video applications that require high throughput.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.289-293
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• 2000

We propose two new algorithms for parallelism-independent scheduling. The machine code generated from the compiler using these algorithms in its scheduling phase is parallelism-independent code, executable in minimum time regardless of the number of the processors in the parallel computer. Our new algorithms have the following phases: finding the minimum number of processors on which the program can be executed in minimal time, scheduling by an heuristic algorithm for this predefined number of processors, and serialization of the parallel schedule according to the earliest start time of the tasks. At run time tasks are taken from the serialized schedule and assigned to the processor which allows the earliest start time of the task. The order of the tasks decided at compile time is not changed at run time regardless of the number of the available processors which means there is no out-of-order issue and execution. The scheduling is done predominantly at compile time and dynamic scheduling is minimized and diminished to allocation of the tasks to the processors. We evaluate the proposed algorithms by comparing them in terms of schedule length to the CP/MISF algorithm. For performance evaluation we use both randomly generated DAGs (directed acyclic graphs) and DACs representing real applications. From practical point of view, the algorithms we propose can be successfully used for scheduling programs for in-order superscalar processors and shared memory multiprocessor systems. Superscalar processors with any number of functional units can execute the parallelism-independent code in minimum time without necessity for dynamic scheduling and out-of-order issue hardware. This means that the use of our algorithms will lead to reducing the complexity of the hardware of the processors and the run-time overhead related to the dynamic scheduling.