• Title/Summary/Keyword: Ring Oscillator

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Design of RF Digitally Controlled Ring Oscillator Using Negative-Skewed Delay Scheme (부 스큐 지연을 이용한 초고주파 디지털 제어 링 발진기 설계)

  • Choi, Jae-Hyung;Hwang, In-Seok
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.439-440
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    • 2008
  • A high-speed DCO is proposed that uses the negative-skewed delay scheme. The DCO consists of a ring of inverters with each PMOS transistor driven from the output of 3 earlier stage through a set of minimum-sized pass-transistors. The digitization of negative-skewed delay is achieved by selecting pass-transistors turned on and digitizing the gate voltages of the selected pass-transistors. The proposed 7-stage DCO has been simulated using 1.8V, $0.18\;{\mu}m$ TSMC CMOS process to obtain a resolution of 3ps and an operation range of 2.88-5.03GHz.

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CMOS Temperature Sensor with Ring Oscillator for Mobile DRAM Self-refresh Control (링 오실레이터를 가진 CMOS 온도 센서)

  • Kim, Chan-kyung;Lee, Jae-Goo;Kong, Bai-Sun;Jun, Young-Hyun
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.485-486
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    • 2006
  • This paper proposes a novel low-cost CMOS temperature sensor for controlling the self-refresh period of a mobile DRAM. In this temperature sensor, ring oscillators composed of cascaded inverter stages are used to obtain the temperature of the chip. This method is highly area-efficient, simple and easy for IC implementation as compared to traditional temperature sensors based on analog bandgap reference circuits. The proposed CMOS temperature sensor was fabricated with 80 nm 3-metal DRAM process. It occupies a silicon area of only about less than $0.02\;mm^2$ at $10^{\circ}C$ resolution with under 5uW power consumption at 1 sample/s processing rate. This area is about 33% of conventional temperature sensor in mobile DRAM.

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Microstrip Square Open Loop Metamaterial Resonator and Rat Race Coupler for Low Phase Noise Push-Push VCO

  • Choi, Jae-Won;Seo, Chul-Hun
    • Journal of electromagnetic engineering and science
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    • v.11 no.4
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    • pp.235-238
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    • 2011
  • In this paper, a novel low phase noise voltage-controlled oscillator (VCO) using metamaterial structure and rat race coupler is presented for reducing the phase noise without the reduction of the frequency tuning range. The metamaterial structure has been realized by microstrip square open loop double split ring resonator (SRR). The rat race coupler shows slightly higher transmission compared to a Wilkinson combiner and is, therefore, used instead to improve the performances of VCO. By providing these unique modifications, the proposed push-push VCO has a phase noise of -126.30~-124.83 dBc/Hz at 100 kHz in the tuning range of 5.672~5.800 GHz.

A Study on the Phase-Noise Generated in Oscillators of Integrated Circuits (집적회로내의 발진기에서 발생하는 위상잡음에 대한 고찰)

  • Park, Se-Hoon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.903-905
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    • 2005
  • Theoretical expressions are introduced to achieve low phase-noise ring oscillators. Understanding of the relations between the phase-noise and the design parameters leads to the reduction of the phase-noise at the stage of the circuit design. Using expressions from reference, ways of reducing the phase noise are suggested.

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A Study on Characteristics of Microwave Transmission Line of Rectangular Split Ring Resonator (사각 분리형 링 공진기의 마이크로파 전송선로 특성 연구)

  • Kim, Girae
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.3 no.2
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    • pp.25-30
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    • 2010
  • In this paper, a novel notch resonator is proposed based on Rectanglar Split Ring Resonator (R-RSS) element. We represented the electrical characteristics for R-SRR elements coupled with microstrip line, and measured result is compared with electromagnetic simulation (HFSS) result. We also solved equivalent circuit for R-SRR element, and also discussed influences of change structural parameters of R-SRR. the size of R-SRR is the most important parameters for frequency tuning. Also we can make tunable resonator form the basic structure. This novel resonator can apply to design of tunable bandpass filter and voltage control oscillator.

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A Study on the Construction and the Output Characteristics of Nd:YAG Laser Using Unstable Ring Resonator (불안정 고리형 공진기를 이용한 Nd:YAG 레이저의 제작 및 발진 특성에 관한 연구)

  • 최승호;박대윤
    • Korean Journal of Optics and Photonics
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    • v.5 no.1
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    • pp.51-59
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    • 1994
  • We constructed travelling type Nd:YAG laser with a negative branch confocal unstable ring (NBCUR) resonator like a Newtonian telescope type using four flat mirror and two positive lenses. Annular output beam was obtained by using scraper mirror. This laser oscillator has 22 optical faces and optical alignment was done by equal inclination interferance method. We inserted a Faraday rotator of permanent magnet type designed in the laboratory for unidirectional operation. We obtained laser output energy of 80m.I with electrical input energy of 70 J. and we obtained that peak power of 0.5MW through Q-switching with BDN dye.

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Fabrication of Organic IC based on Pentacene TFTs on Plastic Substrate (플라스틱 기판에 펜타센 유기박막트랜지스터를 이용한 집적회로 제작)

  • Xu, Yong-Xian;Hwang, Sung-Beom;Song, Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.11
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    • pp.9-14
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    • 2007
  • In this article, the organic integrated circuits such as inverter, ring oscillator, NAND and NOR gates, and rectifier have been fabricated on PEN substrate by using pentacene TFTs, The OTFTs used bottom contact structure and produced the average mobility of 0.26 $cm^2/V.sec$ and on/off current ratio of $10^5$. All circuits successfully worked as the simulation results. Especially, the rectifier was able to operate up to 1 MHz input AC signals, and ring oscillator exhibited oscillation frequency of 1MHz at 40 V. Based on the results of organic integrated circuits we could confirm the possibility of the low cost RFID tags and flexible display with OTFTs.

Design of the 1.9-GHz CMOS Ring Voltage Controlled Oscillator using VCO-gain-controlled delay cell (이득 제어 지연 단을 이용한 1.9-GHz 저 위상잡음 CMOS 링 전압 제어 발진기의 설계)

  • Han, Yun-Tack;Kim, Won;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.72-78
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    • 2009
  • This paper proposes a low phase noise ring voltage controlled oscillator(VCO) with a standard $0.13{\mu}m$ CMOS process for PLL circuit using the VCO-gain-controlled Delay cell. The proposed Delay cell architecture with a active resistor using a MOS transistor. This method can reduced a VCO gain so that improve phase noise. And, Delay cell consist of Wide-Swing Cascode current mirror, Positive Latch and Symmetric load for low phase noise. The measurement results demonstrate that the phase noise is -119dBc/Hz at 1MHz offset from 1.9GHz. The VCO gain and power dissipation are 440MHz/V and 9mW, respectively.

High Speed Mo2N/Mogate MOS Integrated Circuit (동작속도가 빠른 Mo2N/Mo 게이트 MOS 집적회로)

  • 김진섭;이우일
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.4
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    • pp.76-83
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    • 1985
  • Mo2N/Mo double layer which is to be used for gate of the RMOS (refractory metal oxide semiconductor) and interconnection material has been formed by means of low temperature r.f. reactive sputtering in Ar and N2 mixture. The sheet .esistance of 1 000$\AA$Mo2 N/4000$\AA$Mofilm was about 1.20-1.28 ohms/square, which is about an order of magnitude lower than that of polysilicon film. The workfunction difference naE between MO2N/MO layer and (100) p-Si with 6-9 ohm'cm resistivity obtained from C-V plots was about -0.30ev, and the fixed charge density Qss/q in the oxide was about 2. Ix1011/cm2. To evaluate the signal transfer delay time per inverter stage, an integrated ring oscillator circuit consisting of 45-stage inverters was fabricated using the polysilicon gate NMOS process. The signal transfer delay time per inverter stage obtained in this experiment was about 0.8 nsec

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A CMOS Fully Integrated Wideband Tuning System for Satellite Receivers (위성 수신기용 광대역 튜너 시스템의 CMOS 단일칩화에 관한 연구)

  • Kim, Jae-Wan;Ryu, Sang-Ha;Suh, Bum-Soo;Kim, Sung-Nam;Kim, Chang-Bong;Kim, Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.7
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    • pp.7-15
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    • 2002
  • The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.