• Title/Summary/Keyword: Resistive Load

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Design and Verification of Improved Cascaded Multilevel Inverter Topology with Asymmetric DC Sources

  • Tarmizi, Tarmizi;Taib, Soib;Desa, M.K. Mat
    • Journal of Power Electronics
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    • v.19 no.5
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    • pp.1074-1086
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    • 2019
  • This paper presents the design and implementation of an improved cascaded multilevel inverter topology with asymmetric DC sources. This experimental inverter topology is a stand-alone system with simulations and experiments performed using resistance loads. The topology uses four asymmetric binary DC sources that are independent from each other and one H-bridge. The topology was simulated using PSIM software before an actual prototype circuit was tested. The proposed topology was shown to be very efficient. It was able to generate a smooth output waveform up to 31 levels with only eight switches. The obtained simulation and experimental results are almost identical. In a 1,200W ($48.3{\Omega}$) resistive load application, the THDv and efficiency of the topology were found to be 1.7% and 97%, respectively. In inductive load applications, the THDv values were 1.1% and 1.3% for an inductive load ($R=54{\Omega}$ dan L=146mH) and a 36W fluorescent lamp load with a capacitor connected at the dc bus.

A Study on the AC Pow a Study on the AC Power Control Circuit by Combining PWM and Phase Control (PWM과 입상제어의 조합에 의한 교류전력 제어회로에 관한 연구)

  • 정화균;김이곤;장영학
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.5 no.2
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    • pp.84-95
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    • 1991
  • Mostly, phase control method is used to control the single phase AC power. The phase control method has some advantages such as ease to control and simple configuration. But the retardation of firing angle causes a lagging current even if load is purely resistive. So phase control causes a lagging power factor and a low efficiency at the input side in comparing with the system without switching device. A new PWM control method which can improve these defects for single phase AC power control circuit is proposed in this paper. The performances of the single phase AC power control circuit using the proposed method was investigated theoretically. Both power factor and waveform of load current can be improved better than those of the conventional methods.

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Robust Control of DC-DC Converter by Approximate 2DOF Digital Controller Realizing First-Order Model

  • Higuch, Kohji;Takegami, Eiji;Nakano, Kazushi;Tomioka, Satoshi;Watanabe, Kazushi
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.794-799
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    • 2005
  • Robust DC-DC converter which can cover extensive load changes and also input voltage changes with one controller is needed. In this paper, we propose a method for determining the parameters of 2DOF digital controller which makes the control bandwidth wider, and at the same time makes a variation of the output voltage very small at sudden changes of resistive load and the input voltage. The 2DOF digital controller whose parameters are determined by the proposed method is actually implemented on a DSP and is connected to a DC-DC converter. Experimental studies demonstrate that this type of digital controller can satisfy given specifications.

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A 1.5V CMOS High Frequency Operational Amplifier for High Frequency Signal Processing Systems. (고주파 신호처리 시스템을 위한 1.5V CMOS 고주파 연산증폭기)

  • 박광민;김은성;김두용
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1117-1120
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    • 2003
  • In this paper, a 1.5V CMOS high frequency operational amplifier for high frequency signal processing systems is presented. For obtaining the high gain and the high unity gain frequency with the 1.5V supply voltage, the op-amp is designed with simple two stages which are consisting of the rail-to-rail differential input stage and the class-AB output stage. The designed op-amp operates with the 1.5V supply voltage, and shows well the push-pull class-AB operation. The simulation results show the DC open loop gain of 77dB and the unity gain frequency of 100MHz for the 1㏁ ┃ 10pF load. When the resistive load R$_1$. is varied from 1㏁ to 1 ㏀, the DC open loop gain decreases by only 4dB.

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Analysis and Countermeasure for Escalator Vibration (에스컬레이터 진동 분석 및 대책)

  • Lim, Su-Young;Kwon, Yi-Sug;Park, Seon-Ryong;Hong, Seong-Wook
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2000.06a
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    • pp.984-989
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    • 2000
  • This paper deals with an analysis and countermeasure of escalator vibration. The vibration characteristics of escalators are studied theoretically and experimentally to find the main cause of severe vibration. The main source of vibration in escalators is found to be chordal effect due to the step chain and sprocket system. It is also found that the vibration become significantly large at so called no load condition, in which the load due to passengers, during down-moving, is equal to the resistive force in the driving system. Dynamic absorbers are implemented to suppress the vibration. A theoretical analysis is made to determine the appropriate dynamic absorber. Theoretical and experimental study shows that dynamic absorber is effective to suppress the vibration in escalators.

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A Study on DC Circuit Breaker using SCR Chung Hoo Park (SCR 에 의한 직류회로차단기의 과부하차단특성개선)

  • 박정후
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.14 no.2
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    • pp.89-95
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    • 1978
  • A SCR static breaker was studied on the Resistive and inductive load, then on the overload break circuit using operational Amplifier. In this paper, the principal circuit required for forced commutation was voltage commutation by the introduction of a parallel Capacitor. The results obtained are follows; 1. In thecondition that the tima constant of R-C circuit is larger than the turn off time of SCR, the breaker has low transient phenomena and no recovery vol age. 2. By using OP Amplifier on the load circuit, overcurrent trip point will be able to adjust to the wide range of over current. 3. In the over current qrcuit, the power loss was reduced remarkably.

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High-Speed BiCMOS Comparator

  • Jirawath, Parnklang;Wanchana, Thongtungsai
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.510-510
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    • 2000
  • This paper introduces the design of BiCMOS latched comparator circuit for high-speed system application, which can be used in data conversion, instrumentation, communication system etc. By exploiting the advantage technology of the combination of both the bipolar transistor and the CMOS transistor devices. The comparator circuit includes an input stage that combines MOS sampling with a bipolar regenerative amplifier. The resistive load of conventional current-steering comparator is replaced by a load, which is made by a NMOS transistor. The advantage of design and PSPICE simulation of BiCMOS latched comparator are the circuit will obtain wide bandwidth with lowest power consumption at a single supply voltage. All the characteristics of the proposed BiCMOS latched comparator circuit is carried out by simulation program.

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Structural vibration in Escalators :(II) Analysis and Countermeasure (에스컬레이터의 구조적 진동 : (II) 분석 및 대책)

  • 임수영;권이석;박선용;홍성욱
    • Journal of KSNVE
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    • v.10 no.5
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    • pp.830-837
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    • 2000
  • This paper deals with an analysis and countermeasure of escalator vibration. The vibration characteristics of escalators are studied theoretically and experimentally to fine the main cause of severe vibration. The main source of vibration in escalators is found to be chordal effect due to the step chain and sprocket system. It is also found that the vibration become significantly large at so called no load condition, in which the load due to passengers, during down-moving, is equal to the resistive force in the driving system. Dynamic absorbers are implemented to suppress the vibration, A theoretical analysis is made to determine the appropriate dynamic absorber. Theoretical and experimental study shows that dynamic absorber is effective to suppress the vibration in escalators.

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16-ns 256K CMOS SRAM (16-ns 256k CMOS SRAM)

  • Kim, B.Y.;Jung, T.S.;Park, H.C.;Hwang, S.K.;Park, Y.B.;Kim, C.R.;Choi, K.H.
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.311-314
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    • 1988
  • This paper describes 256k (256K ${\times}$1) CMOS SRAM utilizing 1.2um double-polysilicon and double-metal CMOS process. A typical access time of 16ns with a 30-pF load has been achieved through the use of a block architecture, a new decoder, an unique bit-line scheme and an optimized process. Operating current is 55mA at 40MHz and 15mA at 10MHz. A high-resistive polysilicon load has been used to achieve a standby current of 3uA.

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Fuzzy Pre-Compensated PI Control of Active Filters

  • Singh, Bhim;Singhal, Varun
    • Journal of Power Electronics
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    • v.8 no.2
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    • pp.141-147
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    • 2008
  • This paper deals with a new and improved control technique for shunt active filters (AF) used for compensating unwanted harmonic currents injected in the mains due to nonlinear varying loads. This work is motivated by the need to find a permanent solution to the rigorous hit and trial method for evaluating system parameters in an indirect control of AF. A fuzzy pre-compensated PI (Proportional-Integral) controller is used to fuzzify the reference DC voltage of AF to the controller input so that the overshoots and undershoots in its DC link voltage are minimized and the settling time is improved. A three-phase diode rectifier with R-L (Resistive-Inductive) load is used as a non-linear load to study the effectiveness of the proposed controller of the AF. Robustness to filter parameter variations, insensitivity to controller parameter variations, and transient response has been taken as performance evaluation parameters. The results are shown through simulations in Matlab using power system block sets to demonstrate the capability of the proposed controller of the AF.