• Title/Summary/Keyword: Reset period

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Implementation of the Negative Reset Waveform and Driving Circuit for High Speed Addressing in AC PDP (AC PDP에서 고속 어드레싱을 위한 네거티브 리셋 파형 및 구동회로의 구현)

  • Lim, Hyun-Muk;Lim, Seung-Beom;Lee, Jun-Young;Kang, Jung-Won;Hong, Soon-Chan
    • Proceedings of the KIPE Conference
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    • 2007.11a
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    • pp.215-217
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    • 2007
  • Recently, the demand for high definition TV is being increased by beginning of the digital broadcasting. The higher resolution of PDP is, the longer addressing time become, then, the sustain period for display image decreases. Because of the reason, dual-scan method which synchronously write information of an image on top and bottom of the screen is used for the high definition PDP. However, as the price competition of PDP becomes severe, we can`t avoid turning to a single-scan method which uses only a half of an expensive address IC. Accordingly, the sustain period becomes much shorter than prior method. In case of XGA level, it is impossible to display, eventually. In this paper, we are going to prove usefulness by realizing negative reset waveform and the driving circuit for high speed addressing.

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Design of Erase Waveform for Stabilizing Reset Discharge in Mid-gap AC Plasma Display Panels (중간간격을 갖는 교류형 플라즈마 디스플레이 표시기의 소거파형 연구)

  • Yoon, Su-Han;Seo, Jeong-Hyun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.5
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    • pp.993-998
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    • 2011
  • In this paper we suggest new criteria for the classification of the electrode gap between common and scan electrodes. The electrode gap is categorized as a short, middle, and long gap according to the criteria. Among these structures, we focus on the erase waveform of a mid-gap structure. we report an unstable discharge arising from the erase ramp period in a mid-gap structure. Based on the Vt close curve, we analyze the unstable discharge at various conditions. Our analysis reveals that the unstable discharge is ignited between surface electrodes and caused by un-erased wall charges accumulated on the outer edges of electrodes. By reducing the voltage level of the last sustain pulse, the problem is solved.

Performance Analysis of NTT/BT Protocol (NTT/BT 프로토콜의 성능 분석)

  • 이창훈;백상엽;이동주
    • Journal of the Korean Operations Research and Management Science Society
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    • v.22 no.2
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    • pp.99-123
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    • 1997
  • Performance analysis of NTT/BT protocol is investigated, which is a GFC (Generic Flow Control) ptotocol in ATM (Asynchronous Transfer Mode ) network and is based on cyclic reset mechanism. THe mean cell delay time is proposed as a performance measure of NTT/BT protocol. The mean cell delay time is defined as the duration from the instant the cell arrives at the transmission buffer until the cell is fully transmitted. The process of cell transmission can be described as a single server queueing modle with two dependent services. By utilizing this model, mean cell delay time is obtained and sensitivity of the factors such as window size and reset period is also analysed.

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Economic Design of Tool Resetting Period in NC Machining (NC 선반가공에서 공구 조정주기의 경제적 설계)

  • 배문택;윤원영;목학수
    • Journal of the Korean Society for Precision Engineering
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    • v.15 no.6
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    • pp.33-39
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    • 1998
  • This paper is related to economic design of tool-resetting period in NC machining. In NC lathe machining, the mean and variance of components dimension fluctuate in slow time and we should reset tool program to compensate the variation from the fluctuation. In this paper. we propose the procedure determining the optimal resetting period based on the total expected operating cost which consists of resetting cost and the quality cost related to dimension variation. As a case study, using experimental data about dimension changes of a lathe machining, we obtain the regression equations of mean and variance of the dimension fluctuation, total expected operating cost, and optimal resetting period.

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Address and Display Period Complex Driving for Expanding Gray Scale

  • Jung, Kwang-Sig;Kim, Gop-Sig;Shin, Seung-Rok;Chae, Su-Yong;Kim, Dae-Hwan;Yoo, Min-Sun;Cho, Yoon-Hyoung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.647-650
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    • 2005
  • A new driving scheme, Address and Display Period Complex Driving for Expanding Gray Scale(ACE), is proposed by mixing Address Display period Separated(ADS) and Address While Display(AWD). In this method scan lines are divided in blocks driving by AWD and scan lines in block progress sequential high speed addressing. ADS driving get accomplished in low gray level for expanding gray scale. Scan time is reduced and the number of subfields is increased by high speed addressing of ACE. That expands the gray scale and decreases the dynamic false contour. Also, that improves contrast by using ramp reset.

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A Study on the Improvement of the Low Temperature Address Discharge Time Lag of High-Xe Content AC PDP (AC PDP의 저온에서 어드레스 방전 지연 시간 개선에 관한 연구)

  • Kim, Ji-Yong;Kim, Sun;Lee, Seok-Hyun;Lee, Jeong-Hae;Kim, Jun-Yeop
    • Proceedings of the KIEE Conference
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    • 2005.07c
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    • pp.2156-2159
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    • 2005
  • ADS(Address Display Period Separation) driving method has been considered to be the most appropriate driving technique for AC PDP. ADS driving method is composed of reset, address, sustain and erase period. Therefore, a long time should be allocated to an address period, which results in a reduction of brightness. To realize a high luminance and high picture quality, it is necessary to high speed addressing. However, address discharge time lag increases as the temperature decreases, which can cause the misfiring and low picture quality In this paper, the electric field effect and priming particle effect are investigated in order to reduce the address discharge time lag at low temperature. Address discharge time lag was reduced effectively when the priming particles are provided.

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A Study on the Image Sticking Phenomenon in AC PDP (AC PDP의 Image Sticking 현상에 관한 연구)

  • Lim, Sung-Hyun;Shim, Kyoung-Ryul;Kim, Dong-Hyun;Lee, Ho-Joon;Park, Chung-Hoo;Kim, Gyu-Seob
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1640-1643
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    • 2002
  • Image sticking, the phenomenon that the previously displayed pattern still remains after the image is changed into different image, is one of the most serious problem in realizing high picture quality. In this paper, we tried characterizing this undesirable feature in terms of the luminance and the intial firing voltage at ramp up time in reset period. It was found that the cell located at the boundary of previous image pattern show low firing voltage and high background luminance. And the results show that the degree of the image sticking is severely affected by discharge duration and the length of the sustain period.

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Design of Cost-Effective Driving Waveform Based on Vt Close Curve Analysis in AC Plasma Display Panel

  • Cho, Byung-Gwon;Tae, Heung-Sik;Ito, Kazuhiro;Song, Jun-Weon;Lee, Myoung-Kyu;Kim, Sang-Chul;Jung, Nam-Sung;Lee, Kwang-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.251-254
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    • 2005
  • A new driving waveform was proposed to reduce the cost in PDP-TV based on Vt close curve by eliminating the common (X) board under the conventional 42-inch panel structure. Due to the serious misfiring problem during a sustain-period when applying the new driving waveform, the wall voltage was measured and analyzed after the reset-period using Vt close curve. As a result of adopting the proposed driving waveform designed using Vt close curve analysis, the cost of PDP module could reduce compared with the conventional PDP module without any misfiring discharge.

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The study on the image sticking phenomenon in AC PDP (AC PDP의 Image sticking 현상에 대한 연구)

  • Lim, Sung-Hyun;Shim, Kyoung-Ryul;Kim, Dong-Hyun;Lee, Ho-Joon;Park, Chung-Hoo;Kim, Gyu-Seob
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05a
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    • pp.158-161
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    • 2002
  • Among the characteristics of image quality in AC PDP, the serious problem is the image sticking. It can be explained that the previous pattern still remains after the image is changed into different image. In this paper, in case that the length of sustain period and the continued time of still image is varied, the image sticking phenomenon is investigated as the Initial firing voltage at ramp up time during reset period.

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Modified Driving Method for Reducing Address Time During Subfield Time in AC PDP (플라즈마 디스플레이 패널에서 부화면 시간동안 기입시간을 단축시키기 위한 수정된 구동파형)

  • Cho, Byung-Gwon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.1
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    • pp.135-139
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    • 2015
  • The address discharge time lags are investigated in each subfield time in AC plasma display panel and a modified driving waveform is proposed to reduce the address discharge time lag by applying different additional scan voltage under no misfiring discharge production. The weak plasma discharge in AC PDP is generated by applying high positive-going ramp waveform to the scan electrode during the first reset period and that induce the production of the priming particle and wall charge. Because the wall charge becomes the wall voltage in a cell, the wall plus external address voltage produce the address discharge. However, as the wall charge in a cell is gradually disappeared as time passed, the address discharge time in the subfield time for 1 TV frame is lagged. In the first subfield time, the address discharge is faster produced than the other subfield time because the wall charge are much remained by the high positive-going ramp voltage during the reset period in the first subfield time. Meanwhile, from the second to last subfield, the address discharge production time is gradually delayed due to the dissipation of the wall charge in a cell. In this study, the address discharge time lags are measured in each subfield time and the total address discharge time lags are shortened by applying the different additional scan voltage during the address period in each the subfield time.