• ETRI Journal
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• 제30권2호
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• pp.205-215
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• 2008

Many control schemes have been proposed for flow-level traffic control. However, flow-level traffic control is implemented only in limited areas such as traffic monitoring and traffic control at edge nodes. No clear solution for end-to-end architecture has been proposed. Scalability and the lack of a business model are major problems for deploying end-to-end flow-level control architecture. This paper introduces an end-to-end transport architecture and a scalable control mechanism to support the various flow-level QoS requests from applications.

• ETRI Journal
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• 제24권5호
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• pp.333-340
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• 2002

We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 ${\mu}m$ was 100 Mcell/$in^2$ and a specific on-resistance of 0.41 $m{\Omega}{\cdot}cm^2$ was obtained under a blocking voltage of 43 V.

• ETRI Journal
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• 제31권1호
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• pp.62-64
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• 2009

We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo-generated holes at the gate insulator and/or insulator/channel interface.

• ETRI Journal
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• 제35권4호
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• pp.559-565
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• 2013

In this work, we develop a simulation method to predict a two-dimensional luminance distribution method using a circuitry simulation. Based on the simulation results, we successfully fabricate large area ($90mm{\times}90mm$) transparent organic light-emitting diode panels with high luminance uniformity.

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2010년도 임시총회 및 하계학술연구발표회
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• pp.15-16
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• 2010

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2010년도 임시총회 및 하계학술연구발표회
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• pp.118-119
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• 2010

• ETRI Journal
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• 제37권5호
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• pp.833-844
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• 2015

Recently, new network systems have begun to emerge (for instance, 5G, IoT, and ICN) that require capabilities beyond that provided by existing IP networking. To fulfill the requirements, some new networking technologies are being proposed. The promising approach of the new networking technology is to try to overcome the architectural limitations of IP networking by adopting an identifier (ID)-based networking concept in which communication objects are identified independently from a specific location and mechanism. However, we note that existing ID-based networking proposals only partially meet the requirements of emerging and future networks. This paper proposes a new ID-based networking architecture and mechanisms, named IDNet, to meet all of the requirements of emerging and future networks. IDNet is designed with four major functional blocks-routing, forwarding, mapping system, and application interface. For the proof of concept, we develop numeric models for IDNet and implement a prototype of IDNet.

• 한국수정란이식학회:학술대회논문집
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• 한국수정란이식학회 2003년도 제3회 발생공학 국제심포지움 및 학술대회
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• pp.105-105
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• 2003

• 한국수정란이식학회:학술대회논문집
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• 한국수정란이식학회 2003년도 제3회 발생공학 국제심포지움 및 학술대회
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• pp.106-106
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• 2003

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.269-271
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• 2005

Using optimized sputtering condition of a-Si and $SiO_2$ thin film, we can obtained the large grained poly-Si film on PES substrate. The gate dielectric grown by plasma enhanced atomic layer deposition, laser activation and organic interlayer dielectric material make TFTs on PES possible with mobility of $11cm^2/Vs$ (nMOS) and $7cm_2/Vs$ (pMOS).