• Title/Summary/Keyword: Register Controller

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A Study for Register Controller Printing Method using Image Process (영상처리를 이용한 레지스터 컨트롤러 인쇄기법 연구)

  • Hong, Sun-Ki;Jung, Hoon
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.9
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    • pp.56-61
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    • 2010
  • Scanning head has used to detect the error signal in register controller. However the resolution of the system is not enough for E-printing(Electronic-paper printing). In this paper, the register mark shapes and process techniques are studied using a smart camera which can detect the register mark and calculate the printing error. With these, a register controller within 10[um] of error range is developed for e-printing system and confirmed with experiments.

FUNCTIONAL VERIFICATION OF A SAFETY CLASS CONTROLLER FOR NPPS USING A UVM REGISTER MODEL

  • Kim, Kyuchull
    • Nuclear Engineering and Technology
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    • v.46 no.3
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    • pp.381-386
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    • 2014
  • A highly reliable safety class controller for NPPs (Nuclear Power Plants) is mandatory as even a minor malfunction can lead to disastrous consequences for people, the environment or the facility. In order to enhance the reliability of a safety class digital controller for NPPs, we employed a diversity approach, in which a PLC-type controller and a PLD-type controller are to be operated in parallel. We built and used structured testbenches based on the classes supported by UVM for functional verification of the PLD-type controller designed for NPPs. We incorporated a UVM register model into the testbenches in order to increase the controllability and the observability of the DUT(Device Under Test). With the increased testability, we could easily verify the datapaths between I/O ports and the register sets of the DUT, otherwise we had to perform black box tests for the datapaths, which is very cumbersome and time consuming. We were also able to perform constrained random verification very easily and systematically. From the study, we confirmed the various advantages of using the UVM register model in verification such as scalability, reusability and interoperability, and set some design guidelines for verification of the NPP controllers.

A study for register controller of high speed printing machine (고속 인쇄기의 레지스터 컨트롤러에 관한 연구)

  • Jang, Joong-Hack;Lee, Duck-Hyoung;Hong, Sun-Ki
    • Proceedings of the KIEE Conference
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    • 2006.07d
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    • pp.1809-1810
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    • 2006
  • Existing a high-speed printer register controller have used a foreign country goods of the high price. It established the plan to be and progressed to progress research. It find out about former time's a register control system's action. and determined the processor to DSP. It studied the algorithm to consider various situations. It completed finally a simulator board of a register controller of the high capacity.

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A Study on the LQG Precision Tension Control of a Dancer System for a Production of Printed Electronics in Roll-to-roll Systems (Roll-to-roll 시스템에서 인쇄전자 생산을 위한 댄서 시스템의 LQG 정밀 장력 제어에 대한 연구)

  • Seong, Jin-Woo;Kang, Hyun-Kyoo;Shin, Kee-Hyun
    • Journal of the Korean Society for Precision Engineering
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    • v.26 no.10
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    • pp.65-73
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    • 2009
  • For mass production of printed electronics in roll-to-roll fashion, precision tension control is important to reduce register errors. Register error should be minimized within several to tens of microns for many electronic devices to be manufactured through printing technology. In order to achieve this goal, tension disturbance must be attenuated before printing process within a certain range. In this paper, a certain tension range which allows maintaining register error within 10 micron was defined with specific operating conditions. A LQG controller was proposed instead of the conventional PI controller for precision tension control using a multivariable feedback. A guideline to determine design parameters for calculating LQ gain was proposed. The proposed LQG controller was compared to both PI controller and LQ regulator with white noise by numerical simulations. Results showed that the proposed LQG controller was effective for attenuating tension disturbance with white noise.

Register Control on Compensator Roll type Converting Machines (보상롤 타입 컨버팅 머신의 레지스터 제어)

  • Kang Hyun-Kyoo;Kim Jung-In;Shin Kee-Hyun
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.323-324
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    • 2006
  • This paper presents dynamics of register error on a compensator roll type converting machine. Though a register control is an important aspect of a converting machine, it has not been taken into account as a main subject. Lately, demands for high speed converting machines over 500mpm(m/min) are raising but domestic converting industries can not come up with the high speed machines because capacities fur designing of the converting machine is restricted lower than 300mpm. Moreover register control is the key to product flexible displays through roll-to-roll systems. In this paper, a compensator roll type register controller is analyzed using mathematical model of register error. A case study for reducing transient register errors is discussed.

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A Study on the Dynamic Analysis on the Cross Directional Register in Roll-to-roll e-Printing Systems (롤투롤 인쇄전자에서의 횡방향 레지스터 동적 특성 모델링)

  • Kang, Hyun-Kyoo;Ahn, Jin-Hyun;Lee, Chang-Woo;Shin, Kee-Hyun
    • Journal of the Semiconductor & Display Technology
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    • v.9 no.2
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    • pp.61-65
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    • 2010
  • For the adaption of roll-to-roll printing method to the printed electronics, it is mandatory to increase the resolution of register errors. Therefore it is desired to derive the mathematical modeling of register error or to develop controller design. The cross direction register error was derived considering both lateral motion of moving web and transverse position of printing roll. The mathematical modeling was validated and the relationship between the lateral motion and register error was analyzed by numerical simulations in various operating conditions using multi-layer direct gravure printing machine. The results could be used for a design of the CD register in the multi-layer printing and the lateral motion caused by translation.

Design of Built-In Self Test Circuit (내장 자가 검사 회로의 설계)

  • 김규철;노규철
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.723-728
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    • 1999
  • In this paper, we designed a Circular Path Built-In Self Test circuit and embedded it into a simple 8-bit microprocessor. Register cells of the microprocessor have been modified into Circular Path register cells and each register cells have been connected to form a scan chain. A BIST controller has been designed for controlling BIST operations and its operation has been verified through simulation. The BIST circuit described in this paper has increased size overhead of the microprocessor by 29.8% and delay time in the longest delay path from clock input to output by 2.9㎱.

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A Design of DLL(Delay-Locked-Loop) with Low Power & High Speed locking Algorithm (저전력과 고속 록킹 알고리즘을 갖는 DLL(Delay-Locked LooP) 설계)

  • 경영자;이광희;손상희
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12C
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    • pp.255-260
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    • 2001
  • This paper describes the design of the Register Controlled DLL(Delay-Locked Loop) that achieves fast locking and low Power consumption using a new locking algorithm. A fashion for a fast locking speed is that controls the two controller in sequence. The up/down signal due to clock skew between a internal and a external clock in phase detector, first adjusts a large phase difference in coarse controller and then adjusts a small phase difference in fine controller. A way for a low power consumption is that only operates one controller at once. Moreover the proposed DLL shows better jitter performance Because using the lock indicator circuit. The proposed DLL circuit is operated from 50MHz to 200MHz by SPICE simulation. The estimated power dissipation is 15mA at 200MHz in 3.3V operation. The locking time is within 7 cycle at all of operating frequency.

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Study on Automatic Generation of Platform Configuration Register in FlexRay Protocol (FlexRay 프로토콜에서 플랫폼 구성 변수의 자동 생성에 관한 연구)

  • Yang, Jae-Sung;Park, Jee-Hun;Lee, Suk;Lee, Kyung-Chang;Choi, GwangHo
    • IEMEK Journal of Embedded Systems and Applications
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    • v.7 no.1
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    • pp.41-52
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    • 2012
  • Recently, FlexRay was developed to replace controller area network (CAN) protocol in chassis networking systems, to remedy the shortage of transmission capacity and unsatisfactory real-time transmission delay of conventional CAN. FlexRay network systems require correct synchronization and complex scheduling parameters. However, because platform configuration register (PCR) setting and message scheduling is complex and bothersome task, FlexRay is more difficult to implement in applications than CAN protocol. To assist a network designer for implementing FlexRay cluster, this paper presents an analysis of FlexRay platform configuration register and automatic generation program of PCR. To demonstrate the feasibility of the automatic generation program, we evaluated its performance using experimental testbed.

A New Register Transfer Level Synthesis Method for ASIC Design (ASIC 설계를 위한 새로운 레지스터 전송 단계 합성 방법)

  • Lin, Chi-Ho
    • Journal of IKEEE
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    • v.3 no.1 s.4
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    • pp.150-160
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    • 1999
  • This paper presents a new register transfer level synthesis method to overcome the disadvantages of the previous register transfer level synthesis systems. The previous register transfer level synthesis systems first translate from a hardware description language to sequential circuits inadequately. Secondly, the systems separate registers and combinational circuits and then optimize only combinational circuits. This paper describes their disadvantages and then proposes a new method to overcome their shortcomings. This paper also shows the effectiveness of the proposed method by using the proposed method at designing the controller of a surveillance system and the 8-bit signed multiplier.

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