• Title/Summary/Keyword: Reflow temperature

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Formation of Low Temperature and Ultra-Small Solder Bumps with Different Sequences of Solder Layer Deposition (솔더 층의 증착 순서에 따른 저 융점 극 미세 솔더 범프의 볼 형성에 관한 연구)

  • 진정기;강운병;김영호
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.1
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    • pp.45-51
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    • 2001
  • The effects of wettability and surface oxidation on the low temperature and ultra-fine solder bump formation have been studied. Difference sequences of near eutectic In-Ag and eutectic Bi-Sn solders were evaporated on Au/Cu/Cr or Au/Ni/Ti Under Bump Metallurgy (UBM) pads. Solder bumps were formed using lift-off method and were reflowed in Rapid Thermal Annealing (RTA) system. The solder bumps in which In was in contact with UBM in In-Ag solder and the solder bumps in which Sn was in contact with UBM in Bi-Sn solder showed better bump formability during reflow than other solder bumps. The ability to form spherical solder bumps was affected mainly by the wettability of solders to UBM pads.

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The Wetting Properties of UBM-coated Si-wafer to the Lead-free Solders in Si-wafer/Bumps/Glass Flip-Chip Bonding System

  • Hong, Soon-Min;Park, Jae-Yong;Park, Chang-Bae;Jung, Jae-Pil;Kang, Choon-Sik
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2000.04a
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    • pp.74-79
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    • 2000
  • In an attempt to estimate the wetting properties of wettable metal layers by wetting balance method, an analysis of wetting curves of the coating layer was performed. Based on the analysis, wetting properties of UBM-coated Si-plate were estimated by the new wettability indices. The wetting curves of the one and both sides-coated UBM layers have the similar shape and show the similar tendency to the temperature. So the wetting property estimation of one side coating is possible with wetting balance method. For UBM of Si-chip, Cr/Cu/Au UBM is better than Ti/Ni/Au in the point of wetting time. At general reflow temperature, the wettability of high melting point solders(Sn-Sb, Sn-Ag) is better than that of few melting point ones(Sn-Bi, Sn-In).The contact angle of the one side coated plate to the solder can be calculated from the farce balance equation by measuring the static state force and the tilt angle.

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Lower Temperature Soldering of Capacitor Using Sn-Bi Coated $Sn-3.5\%Ag$ Solder (Sn-Bi도금 $Sn-3.5\%Ag$ 솔더를 이용한 Capacitor의 저온 솔더링)

  • Kim Mi-Jin;Cho Sun-Yun;Kim Sook-Hwan;Jung Jae-Pil
    • Journal of Welding and Joining
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    • v.23 no.3
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    • pp.61-67
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    • 2005
  • Since lead (Pb)-free solders for electronics have higher melting points than that of eutectic Sn-Pb solder, they need higher soldering temperatures. In order to decrease the soldering temperature we tried to coat Sn-Bi layer on $Sn-3.5\%Ag$ solder by electroplating, which applies the mechanism of transient liquid phase bonding to soldering. During heating Bi will diffuse into the $Sn-3.5\%Ag$ solder and this results in decreasing soldering temperature. As bonding samples, the 1608 capacitor electroplated with Sn, and PCB, its surface was finished with electroless-plated Ni/Au, were selected. The $Sn-95.7\%Bi$ coated Sn-3.5Ag was supplied as a solder between the capacitor and PCB land. The samples were reflowed at $220^{\circ}C$, which was lower than that of normal reflow temperature, $240\~250^{\circ}C$, for the Pb-free. As experimental result, the joint of $Sn-95.7\%Bi$ coated Sn-3.5Ag showed high shear strength. In the as-reflowed state, the shear strength of the coated solder showed 58.8N, whereas those of commercial ones were 37.2N (Sn-37Pb), 31.4N (Sn-3Ag-0.5Cu), and 40.2N (Sn-8Zn-3Bi). After thermal shock of 1000 cycles between $-40^{\circ}C$ and $+125^{\circ}C$, shear strength of the coated solder showed 56.8N, whereas the previous commercial solders were in the range of 32.3N and 45.1N. As the microstructures, in the solder $Ag_3Sn$ intermetallic compound (IMC), and along the bonded interface $Ni_3Sn_4$ IMC were observed.

Joint Property of Sn-Cu-Cr(Ca) Middle Temperature Solder for Automotive Electronic Module (자동차 전장모듈용 Sn-Cu-Cr(Ca) 중온 솔더의 접합특성 연구)

  • Bang, Junghwan;Yu, Dong-Yurl;Ko, Yong-Ho;Kim, Jeonghan;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.31 no.5
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    • pp.54-58
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    • 2013
  • Joint properties of vehicle ECU (Electric Control Unit) module which was manufactured by using Sn-Cu-Cr-Ca alloy were investigated. A new solder which has a middle melting temperature about $231^{\circ}C$ was fabricated as the type of 300um solder ball and paste type. The prototype modules were made by reflow process and measured spreadability, wettability shear strength and estimated interface reaction. The spreadability of the alloy was about 84% from the measurement of contact angle of the solder ball and the wetting force was measured 2mN. The average shear strength of the module which was manufactured by using the solder paste, was 1.9 $kg/mm^2$. Also, the thickness of IMC(intermetallic compound) was evaluated with various aging temperature and time in order to understand Cr effect on Sn-0.7Cu solder. $Cu_6Sn_5$ IMC was formed between Cu pad and the solder alloy and the average thickness of the $Cu_6Sn_5$ IMC was measured about 4um and it was about 50% of thickness of $Cu_6Sn_5$ IMC in Sn-0.7Cu. It is expected to have a positive effect on reliability of the solder joint.

Formation of ultra-shallow $p^+-n$ junction through the control of ion implantation-induced defects in silicon substrate (이온 주입 공정시 발생한 실리콘 내 결함의 제어를 통한 $p^+-n$ 초 저접합 형성 방법)

  • 이길호;김종철
    • Journal of the Korean Vacuum Society
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    • v.6 no.4
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    • pp.326-336
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    • 1997
  • From the concept that the ion implantation-induced defect is one of the major factors in determining source/drain junction characteristics, high quality ultra-shallow $p^+$-n junctions were formed through the control of ion implantation-induced defects in silicon substrate. In conventional process of the junction formation. $p^+$ source/drain junctions have been formed by $^{49}BF_2^+$ ion implantation followed by the deposition of TEOS(Tetra-Ethyl-Ortho-Silicate) and BPSG(Boro-Phospho-Silicate-Glass) films and subsequent furnace annealing for BPSG reflow. Instead of the conventional process, we proposed a series of new processes for shallow junction formation, which includes the additional low temperature RTA prior to furnace annealing, $^{49}BF_2^+/^{11}B^+$ mixed ion implantation, and the screen oxide removal after ion implantation and subsequent deposition of MTO (Medium Temperature CVD oxide) as an interlayer dielectric. These processes were suggested to enhance the removal of ion implantation-induced defects, resulting in forming high quality shallow junctions.

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A study of joint properties of Sn-Cu-(X)Al(Si) middle-temperature solder for automotive electronics modules (자동차 전장부품을 위한 Sn-0.5Cu-(X)Al(Si) 중온 솔더의 접합특성 연구)

  • Yu, Dong-Yurl;Ko, Yong-Ho;Bang, Junghwan;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.33 no.3
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    • pp.19-24
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    • 2015
  • Joint properties of electric control unit (ECU) module using Sn-Cu-(X)Al(Si) lead-free solder alloy were investigated for automotive electronics module. In this study, Sn-0.5Cu-0.01Al(Si) and Sn-0.5Cu-0.03Al(Si) (wt.%) lead-free alloys were fabricated as bar type by doped various weight percentages (0.01 and 0.03 wt.%) of Al(Si) alloy to Sn-0.5Cu. After fabrications of lead-free alloys, the ball-type solder alloys with a diameter of 450 um were made by rolling and punching. The melting temperatures of 0.01Al(Si) and 0.03Al(Si) were 230.2 and $230.8^{\circ}C$, respectively. To evaluation of properties of solder joint, test printed circuit board (PCB) finished with organic solderability perseveration (OSP) on Cu pad. The ball-type solders were attached to test PCB with flux and reflowed for formation of solder joint. The maximum temperature of reflow was $260^{\circ}C$ for 50s above melting temperature. And then, we measured spreadability and shear strength of two Al(Si) solder materials compared to Sn-0.7Cu solder material used in industry. And also, microstructures in solder and intermetallic compounds (IMCs) were observed. Moreover, thickness and grain size of $Cu_6Sn_5$ IMC were measured and then compared with Sn-0.7Cu. With increasing the amounts of Al(Si), the $Cu_6Sn_5$ thickness was decreased. These results show the addition of Al(Si) could suppress IMC growth and improve the reliability of solder joint.

Warpage Characteristics of Bottom Packages for Package-on-Package(PoP) with Different Chip Mounting Processes (칩 실장공정에 따른 Package on Package(PoP)용 하부 패키지의 Warpage 특성)

  • Jung, D.M.;Kim, M.Y.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.3
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    • pp.63-69
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    • 2013
  • The warpage of a bottom package of Package on Package(PoP) where a chip was mounted to a substrate by flip chip process was compared to that of a bottom package for which a chip was bonded to a substrate using die attach film(DAF). At the solder reflow temperature of $260^{\circ}C$, the packages processed with flip chip bonding and DAF bonding exhibited warpages of $57{\mu}m$ and $-102{\mu}m$, respectively. At the temperature range between room temperature and $260^{\circ}C$, the packages processed with flip chip bonding and DAF bonding exhibited warpage values ranging from $-27{\mu}m$ to $60{\mu}m$ and from $-50{\mu}m$ to $-15{\mu}m$, respectively.

Evaluation of Bonding Properties of Epoxy Solder Joints by High Temperature Aging Test (고온 시효 시험에 따른 Epoxy 솔더 접합부의 접합 특성 평가)

  • Kang, Min-Soo;Kim, Do-Seok;Shin, Young-Eui
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.32 no.1
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    • pp.6-12
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    • 2019
  • Bonding properties of epoxy-containing solder joints were investigated by a high temperature aging test. Specimens were prepared by bonding an R3216 standard chip resistor to an OSP-finished PCB by a reflow process with two basic types of solder (SAC305 & Sn58Bi) pastes and two epoxy-solder (SAC305+epoxy & Sn58Bi+epoxy) pastes. In all epoxy solder joints, an epoxy fillet was formed in the hardened epoxy, lying around the outer edge of the solder joint, between the chip and the Cu pad. In order to analyze the bonding characteristics of solder joints at high temperatures, a high-temperature aging test at $150^{\circ}C$ was carried out for 14 days (336 h). After aging, the intermetallic compound $Cu_6Sn_5$ was found to have formed in the solder joint on the Cu pad, and the shear stress on the conventional solder joint was reduced by a significant amount. The reason that the shear force did not decrease much, even though in epoxy solder, was thatbecause epoxy hardened at the outer edge of the supported solder joints. Using epoxy solder, strong bonding behavior can be ensured due to this resistance to shear force, even in metallurgical changes such as those where intermetallic compounds form at solder joints.

INTERCONNECTION TECHNOLOGY IN ELECTRONIC PACKAGING AND ASSEMBLY

  • Wang, Chunqing;Li, Mingyu;Tian, Yanhong
    • Proceedings of the KWS Conference
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    • 2002.10a
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    • pp.439-449
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    • 2002
  • This paper reviews our recent research works on the interconnection technologies in electronic packaging and assembly. At the aspect of advanced joining methods, laser-ultrasonic fluxless soldering technology was proposed. The characteristic of this technology is that the oxide film was removed through the vibration excitated by high frequency laser change in the molten solder droplet. Application researches of laser soldering technology on solder bumping of BGA packages were carried out. Furthermore, interfacial reaction between SnPb eutectic solder and Au/Ni/Cu pad during laser reflow was analyzed. At the aspect of soldered joints' reliability, the system for predicting and analyzing SMT solder joint shape and reliability(PSAR) has been designed. Optimization design method of soldered joints' structure was brought forward after the investigation of fatigue failure of RC chip devices and BGA packages under temperature cyclic conditions with FEM analysis and experimental study. At the aspect of solder alloy design, alloy design method based on quantum was proposed. The macroproperties such as melting point, wettability and strength were described by the electron parameters. In this way, a great deal of the experimental investigations was replaced, so as to realize the design and research of any kinds of solder alloys with low cost and high efficiency.

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Study on the Nonlinear Characteristic Effects of Dielectric on Warpage of Flip Chip BGA Substrate

  • Cho, Seunghyun
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.2
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    • pp.33-38
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    • 2013
  • In this study, both a finite element analysis and an experimental analysis are executed to investigate the mechanical characteristics of dielectric material effects on warpage. Also, viscoelastic material properties are measured by DMA and are considered in warpage simulation. A finite element analysis is done by using both thermal elastic analysis and a thermo-viscoelastic analysis to predict the nonlinear effects. For experimental study, specimens warpage of non-symmetric structure with body size of $22.5{\times}22.5$ mm, $37.5{\times}37.5$ mm and $42.5{\times}42.5$ mm are measured under the reflow temperature condition. From the analysis results, experimental warpage is not similar to FEA results using thermal elastic analysis but similar to FEA results using thermo-viscoelastic analysis. Also, its effect on substrate warpage is increased as core thickness is decreased and body size is getting larger. These FEA and the experimental results show that the nonlinear characteristics of dielectric material play an important role on substrate warpage. Therefore, it is strongly recommended that non-linear behavior characteristics of a dielectric material should be considered to control warpage of FCBGA substrate under conditions of geometry, structure and manufacturing process and so on.