• Journal of Power Electronics
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• 제14권1호
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• Journal of Power Electronics
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• 제16권6호
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• pp.2139-2149
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• 2016

In this study, a new type of cascaded modular multilevel inverters (CMMLIs) is presented which is able to produce a considerable number of output voltage levels with a reasonable number of components. Accordingly, each series stage of the proposed CMMLI is comprised of two same basic units that are connected with each other through two unidirectional power switches without aiming any of the full H-bridge cells. In addition, since the potentiality for generating a higher number of output voltage levels in CMMLIs hinges on the magnitude of the dc voltage sources used in each series unit, in the rest of this paper, four different algorithms for determining an appropriate value for the dc sources' magnitude are also presented. In the following, a comprehensive topological analysis between some CMMLI structures reported in the literature and proposed structure along with several simulation and experimental results will be also given to validate the lucrative benefits and viability of the proposed topology.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.105-107
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• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.127-135
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• 2014

In this paper a novel converter structure based on cascade converter family is presented. The suggested multilevel advanced cascade converter has benefits such as reduction in number of switches and power losses. Comparison depict that proposed topology has the least number of IGBTs among all multilevel cascade type converters which have been introduced recently. This characteristic causes low cost and small installation area for suggested converter. The number of on state switches in current path is less than conventional topologies and so the output voltage drop and power losses are decreased. Symmetric and asymmetric modes are analyzed and compared with conventional multilevel cascade converter. Simulation and experimental results are presented to illustrate validity, good performance and effectiveness of the proposed configuration. The suggested converter can be applied in medium/high voltage and PV applications.

• 한국식품영양학회지
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• 제13권1호
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• pp.45-52
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• 2000

In order to select the optimum ethanol concentration for extraction of volatile components in cinnamon, the dried cinnamon was extracted with water and 30∼90% ethanol. The volatile components of cinnamon extracts were isolated by the simultaneous distillation extraction method using Likens and Nickerson's extraction apparatus, and analyzed by GC-MS. In cinnamon bark powder 45 components were detected and 21 components were identified. The major component of cinnamon bark powder was cinnamic aldehyde. In water extract of cinnamon, volatile components were not extracted sufficiently. The volatile components of cinnamon were increased with the increment of ethanol concentraction upto 70%. The volatile component of 70% ethanol extract showed similar pattern and amount to cinnamon bark powder. But in 90% ethanol extracts, the number and amount of volatile component were reduced. The above data suggested that 70% ethanol was the most effective solvent for volatile components extraction of cinnamon.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.2039-2042
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• 2002

In this paper, we propose a technique used to simplify the trellis diagram, thus, reduce the complexity of Viterbi decoder in term of the number of Compare-Select (CS) operations needs in decoding process. It is shown that if the branch metrics are properly decomposed into orthogonal components. The trellis diagram can be modified that each original state with large number branches terminating to it can be broken into a number of sub-states having smaller number of branches terminating to them. Simulation results shown that the newly proposed technique can be used reduced the complexity of 8 and 16 PSK-TCMs without degrading the BER performance.

• 한국음향학회지
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• 제22권8호
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• pp.711-716
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• 2003

본 논문은 연속밀도 은닉마코프모델에서 각 상태별 혼합성분 개수를 결정하는 방법을 제안한다. 지금까지의 대부분의 연구가 연속밀도 은닉마코프모델에서 화자의 스펙트럼 특성에 상관없이 각 상태별 동일한 혼합성분 개수를 적용하였다. 이런 접근방법은 많은 계산량을 요구할 뿐만 아니라, 각 상태의 특성을 무시하고 있기 때문에 각 상태별 음성신호의 정확한 모델링을 할 수 없다. 따라서 본 논문에서 제안한 연속밀도 은닉마코프모델의 파라미터 추정은 각 상태별 혼합성분에 대한 발생 확률값에 따라서 결정하였다. 또한 혼합성분의 개수를 줄이는 과정에서 신호의 상관성을 줄이고 시스템의 전체적인 안정성을 얻기 위해서 주성분 분석을 이용하였다. 제안한 방법은 기존의 은닉마코프모델에 비해서 평균 10% 작은 혼합성분 개수를 이용했을 때를 기준으로 실험하였다. 실험결과에서 혼합성분 결정만을 적용했을 때 거의 비슷한 성능을 얻을 수 있었다. 그리고 주성분 분석을 이용했을 때, 특정벡터가 16 차일 때 평균 0.35%의 성능감소가 일어났지만, 25 차에서는 평균 0.65%의 성능개선을 얻을 수 있었다.

• Journal of Electrical Engineering and Technology
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• 제7권4호
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• pp.538-545
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• 2012

In this paper a novel cascaded transformer multilevel inverter is proposed. Each basic unit of the inverter includes two DC sources, single phase transformers and semiconductor switches. This inverter, which operates as symmetric and asymmetric, can output more number of voltage levels in the same number of the switching devices. Besides, the number of gate driving circuits is reduced, which leads to circuit size reduction and lower power consumption in the driving circuits. Moreover, several methods to determination of transformers turn ratio in proposed inverter are presented. Theoretical analysis, simulation results using MATLAB/SIMULINK and experimental results are provided to verify the operation of the suggested inverter.

• Transactions on Electrical and Electronic Materials
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• 제18권4호
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• pp.229-236
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• 2017

This paper deals with the design and implementation of an efficient topology for cascaded multilevel inverters with reduced part counts. In the proposed design, a well-established basic unit is first developed. The series extension of this unit results in the formation of the proposed multilevel inverter. The proposed design minimizes the number of power electronic components including insulated-gate bipolar transistors and gate driver circuits, which in turn cuts down the size of the inverter assembly and reduces the operating power losses. An explicit control strategy with enhanced device efficiency is also acquired. Thus, the part count reductions enhance not only the economical merits but also the technical features of the entire system. In order to accomplish the desired operational aspects, three algorithms are considered to determine the magnitudes of the dc voltage sources effectively. The proposed topology is compared with the conventional cascaded H-bridge multilevel inverter topology, to reflect the merits of the presented structure. In continue, both the analytical and experimental results of a cascaded 31-level structure are analyzed. The obtained results are discussed in depth, and the exemplary performance of the proposed structure is corroborated.

• Journal of Power Electronics
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• 제16권4호
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• pp.1316-1323
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• 2016

Multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to their inherent properties such as reduced harmonic distortion, lower electromagnetic interference, minimal common mode voltage, ability to synthesize medium/high voltage from low voltage sources, etc. On the other hand, they suffer from an increased number of switching devices, complex gate pulse generation, etc. This paper develops an ingenious symmetrical MLI topology, which consumes lesser component count. The proposed level dependent sources concoction multilevel inverter (LDSCMLI) is basically a multilevel dc link MLI (MLDCMLI), which first synthesizes a stepped dc link voltage using a sources concoction module and then realizes the ac waveform through a conventional H-bridge. Seven level and eleven level versions of the proposed topology are simulated in MATLAB r2010b and prototypes are constructed to validate the performance. The proposed topology requires lesser components compared to recent component reduced MLI topologies and the classical topologies. In addition, it requires fewer carrier signals and gate driver circuits.