• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.741-744
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• 1999

In this paper, We represent a low complexity of parallel canonical basis multiplier for GF( q$^{n}$ ), ( q＞ 2). The Mastrovito multiplier is investigated and applied to multiplication in GF(q$^{n}$ ), GF(q$^{n}$ ) is different with GF(2$^{n}$ ), when MVL is applied to finite field. If q is larger than 2, inverse should be considered. Optimized irreducible polynomial can reduce number of operation. In this paper we describe a method for choosing optimized irreducible polynomial and modularizing recursive polynomial operation. A optimized irreducible polynomial is provided which perform modulo reduction with low complexity. As a result, multiplier for fields GF(q$^{n}$ ) with low gate counts. and low delays are constructed. The architectures are highly modular and thus well suited for VLSI implementation.

• 제어로봇시스템학회논문지
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• 제4권4호
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• pp.517-524
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• 1998

This paper discusses the development of a reactive power controller using digital signal processing. Digital Signal Processing is the technique of using digital devices to Process continuous signals or data, often in real-time. And DSP algorithms are associated with a discrete time interval between input samples. When one designs a digital filter, one can use a Laplace transform to determine the continuous time frequency response. The corresponding discrete time transform is called Z transform and depends upon discrete samples of the input spaced equally in time. The objectives of this paper are to minimize real power losses and improve the power factor of a given system. Also, the implementation of a direct-form non recursive filter on the TMS320C31 has been described. The application of this microprocessor-based controller using DSP on test system reveals its numerous advantages. Performance and features of the controller for the reactive power control are analyzed.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.384-387
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• 1998

This paper presents a newly developed speed sensorless drive using RLS(Recursive Least Squares) based on Neural Network Training Algorithm. The proposed algorithm based on the RLS has just the time-varying learning rate, while the well-known back-propagation (or generalized delta rule) algorithm based on gradient descent has a constant learning rate. The number of iterations required by the new algorithm to converge is less than that of the back-propagation algorithm. The RLS based on NN is used to adjust the motor speed so that the neural model output follows the desired trajectory. This mechanism forces the estimated speed to follow precisely the actual motor speed. In this paper, a flux estimation strategy using filter concept is discussed. The theoretical analysis and experimental results to verify the effectiveness of the proposed analysis and the proposed control strategy are described.

• 한국통신학회논문지
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• 제15권6호
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• pp.526-534
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• 1990

디지털 필터의 실현시 필터 계수를 유한어장으로 양자화할 때 계수 오차가 나타난다. 이 오차는 디지털 필터의 주파수 응답과 출력 특성을 변화시키고 특히 순환 필터에서는 계수 감도를 민감하게 하는 주요 원인 된다. 본 논문에서는 비교적 계수 오차의 감도가 낮은 WDF(Wave Digital Filter)의 계수 감도 특성에 관하여 검토하였다. 고정 소수점 양자화 방법을 이용하여 주파수 응답을 시뮬레이션한 결과유한 어장이 변화할 때 WDF의 주파수 응답이 기존의 cascade IIR 필터에 비해 비교적 우수함을 보였다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1996년도 추계학술대회 논문집
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• pp.754-758
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• 1996

This paper presents a new approach to the design of self-tuning adaptive control system that is robust to the changing dynamic configuration as well as to the load variation factors using Digital signal processors for robot manipulators. TMS320C50 is used in implementing real-time adaptive control algorithms to provide advanced performance for robot manipulator, In this paper, an adaptive control scheme is proposed in order to design the pole-placement self-tuning controller which can reject the offset due to any load disturbance without a detailed description of robot dynamics. Parameters of discrete-time difference model are estimated by the recursive least-square identification algorithm, and controller parameters we determined by the pole-placement method. Performance of self-tuning adaptive controller is illusrated by the simulation and experiment for a SCARA robot.

• 한국통신학회논문지
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• 제21권8호
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• pp.1885-1896
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• 1996

This paper describes the implementation of the AVT(Automatic video Tracker) using ASIC. The basic tracking algorithm is based on the spatio-temporal gradient method, and adaptive window sizing, track state decision algorithm were also realized. Newly developed ASIC performs recursive image filtering, extraction of spatio-temporal gradient/gradient functions of image in field rate. Using the FPGA/ASIC, the tracker was simply realized in one board type which can be easily applied to various image system. We conformed ASIC operation by computer simulation and tested the system in real tracking situations. From the result, the system can track the moving target which has a velocity of 2-3 pixel/field and a size of varying from 2 to 128 pixes. Also fast refresh rateof motion estimation(60Hz) improves the characteristics of servoing system which forms feedback loop with the tracker.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1987년도 정기총회 및 창립40주년기념 학술대회 학회본부
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• pp.25-28
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• 1987

Design procedure of adaptive controller with variable load condition is present and applied to velocity control of small, permanent magnet DC servo motor. The state feedback control scheme is adopted and Recursive Least Squares algorithm is used for parameter estimation. In order to reduce the time consuming. In the procedure of adaptation-gain tuning of state feedback controller, approximate curve fitting technique is applied to the relations between load condition and poles of the system, load condition and feedback gains. With this method, fast adaptation can be accomplished. It is shown that this procedure can be applied not only to variable load condition but also to variation of other system constants, for example variation of resistance and inductance etc.. Simulation results is present for both cases - variable inertia load, variable motor resistance to verify performance improvements. This design procedure produces an adaptive con troller which is feasible for implementation with microprocessor by reducing calculation time.

• 대한전자공학회논문지
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• 제25권2호
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• pp.204-210
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• 1988

The residue number system offers the possibility of high-speed operation and error detection/correction because of the separability of arithmetic operations on each digit. A compact residue arithmetic module named the self-checking pulse-train residue arithmetic circuit is effectively employed as the basic module, and an efficient error detection/correction algorithm in which error detection is performed in each basic module and error correction is performed based on the parallelism of residue arithmetic is also employed. In this case, the error correcting circuit is imposed in series to non-redundant system. This design method has an advantage of compact hardware. Following the proposed method, a 2nd-order recursive fault-tolerant digital filter is practically implemented, and its fault-tolerant ability is proved by noise injection testing.

• 제어로봇시스템학회논문지
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• 제12권8호
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• pp.810-817
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• 2006

This paper presents a rotational motion estimation and correction technique for digital image stabilization. An equivalent rotation model is derived so as to accommodate a combined rotational and the translational motion. Thanks to this simplification, the suggested estimation algorithm can directly find the rotational center using geometric characteristic of local motion vectors instead of using searching method. And we also present recursive version of frame to reference algorithm(FRA) for the real time implementation. The proposed DIS system does not require time consuming parameter searching process, while showing comparatively good performance compared with the previous ones. To show the effectiveness of the DIS scheme, the algorithm has been implemented on the DSP based hardware system and experimental results are also discussed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -1
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• pp.406-409
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• 2000

This paper proposes a method that enables us to implement the recursive least squares (RLS) algorithm at, high throughput rate using fewer processing elements (PEs). It is known that the pipeline processing can provide a high throughput rate. But, pipelining is effective only when enough number of PEs are available. The proposed method achieves high throughput rate using a few PEs. The effectiveness of the proposed method is verified through simulations on programmable digital signal processors (in the following, DSP processors).