• Title/Summary/Keyword: Receiver front-end

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Design of Wideband Ku-band Low Noise Down-converter for Satellite Broadcasting (Ku-band 광대역 위성방송용 LNB 설계)

  • Hong, Do-Hyeong;Mok, Gwang-Yun;Park, Gi-Won;Rhee, Young-Chul
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.941-944
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    • 2015
  • In this paper study for VSAT(very small aperture terminal) LNB(low noise block). ship LNB was demanded high stability and low noise figure. We designed FEM(Front-End Module) that was operated multi-band. FEM designed was constructed in a multi-band low noise receiver amplifier, a frequency converter, IF amplifier, Voltage Control Oscillator signal generating circuit four circuit using. To convert the multi-band 2.05GHz band, it generates four local oscillator signals, the four(band1, band2, band3, band4) designed to output an IF signal developed conversion apparatus, the conversion gain 64dB, noise figure 1dB or less, output P1dB 15dBm or more, phase noise showed -73dBc@100Hz.

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Two-stage Adaptive Digital AGC Method for SDR Radio (SDR 통신장비를 위한 2단계 적응형 Digital AGC 기법)

  • Park, Jong-Hun;Kim, Young-Je;Cho, Jung-Il;Cho, Hyung-Weon;Lee, Young-Po;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.6C
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    • pp.462-468
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    • 2012
  • In this paper, an adaptive digital automatic gain control(AGC) algorithm with two stages is proposed. AGC technique is crucial for mobile communication equipment because path loss in wireless channel and gain fluctuation in receiver front-end continuously change the received signal strength. Furthermore, adaptive criteria should be applied to the design of AGC algorithm in order to support many waveforms with one SDR communication device. With these reasons, a two-stage structure is proposed to satisfy both flexibility and adaptiveness. Compared with conventional method, it also requires shorter convergence time. Numerical results show that the gain value of variable gain amplifier(VGA) is converged within proper time and proposed scheme controls the input level of analog to digital converter(ADC) to be stable during long range of time.

Development of RF IC, Signal Processing IC and Software for Portable GPS Receiver (휴대 GPS 수신기용 RF IC, 신호처리 IC 및 소프트웨어 개발)

  • Ryum, Byung R.;Koo, Kyung Heon;Song, Ho Jun;Jee, Gyu In
    • Journal of Advanced Navigation Technology
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    • v.1 no.1
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    • pp.23-34
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    • 1997
  • A multi-channel digital GPS receiver has been developed including a RF-to-IF engine (engine 1), a digital signal processing engine (engine 2) with a microprocessor interfacing, and a navigation software. A high speed SiGe heterojunction bipolar transistor (HBT) as a active device has been mounted on chip-on-board (COB) type hybrid ICs such as LNA, mixer, and VCO in RF front-end of the engine 1 board. A 6-channel digital correlator together with a real-time clock and a microprocessor interface has been realized using an Altera Flex 10K FPGA as well as ASIC technology. Navigation software controlling the correlator for GPS signal tracking, retrieval and storing a message retrieval, and position calculation has been implemented. The GPS receiver was tested using a single channel STR2770 simulator. Successful navigation message retrieval and position determination was confirmed.

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Study on Improvement of DTV Signal Reception Performance Using New Mobile Channel Modelling and Estimation Algorithm (새로운 이동 채널 모델 및 추정 알고리즘을 이용한 이동 DTV 수신 성능 개선에 관한 연구)

  • Lee, Chong-Hyun;Kim, Kwang-Ho;Kim, Kwang-Ho;Cha, Jae-Sang
    • Journal of Broadcast Engineering
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    • v.11 no.4 s.33
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    • pp.521-532
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    • 2006
  • Recently, many research initiatives have been underway to improve reception performance of ATSC based DTV signal in mobile channel by adopting multiple antennas. In this paper, we propose a new mobile channel model which can be applicable to any array geometry. And then we propose new channel estimation algorithm which uses PN5l1 sequence in field synch. The proposed algorithm is to estimate channel by correlating the input signal in If frequency band and finding maximum peak, which does not need complicated synchronization circuit. Finally, we propose new receiver structures which can be implemented at the front-end of the existing receiver with no modification. With computer simulation, we verify the performance of the proposed model and verify the performance of the receiver structure with computer simulation.

Design of 250-Mbps 10-Channel CMOS Optical Receiver Away for Parallel Optical Interconnection (병렬 광 신호 전송을 위한 250-Mbps 10-채널 CMOS 광 수신기 어레이의 설계)

  • Kim, Gwang-O;Choe, Jeong-Yeol;No, Seong-Won;Im, Jin-Eop;Choe, Jung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.37 no.6
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    • pp.25-34
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    • 2000
  • This paper describes design of a 250-Mbps 10-channel optical receiver array for parallel optical interconnection with the general-purpose CMOS technology The optical receiver is one of the most important building blocks to determine performance of the parallel optical interconnection system. The chip in CMOS technology makes it possible to implement the cost-effective system also. Each data channel consists of analog front-end including the integrated photo-detector and amplifier chain, digital block with D-FF and off-chip driver. In addition, the chip includes PLL (Phase-Lock Loop) for synchronous data recovery. The chip was fabricated in a 0.65-${\mu}{\textrm}{m}$ 2-poly, 2-metal CMOS technology. Power dissipation of each channel is 330㎽ for $\pm$2.5V supply.

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Mixer using the direct-conversion method (직접 변환 방식을 이용한 주파수 혼합기)

  • Lim Chae-sung;Kim Sung-woo;Choi Hyek-Hwan;Lee Myoung-kyo;Kwon Tae-ha
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.6
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    • pp.1269-1276
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    • 2005
  • In this paper, Mixer using the direct-conversion method intended to use in front-end of a RF receiver is designed. The direct conversion Mixer is an alternative wireless receiver architecture to the well-established superheterodyne, particularly for high integration, low power, and low cost. It operates at 2.4GHz band, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. Layout is implemented with a Mentor IC Station. The 2.4GHz CMOS Mixer employs a modified single-balanced Gilbert Cell with additional MOSFET in the output stages to improve IIP2, which is a standard of linearity in direct conversion receiver. Additional coversion-stages's transconductances are controlled by each MOSFET's physical properties. The HSPICE simulation results show that the 2.4GHz CMOS Mixer has voltage gam of 29dB, IIP2 of 63dBm, respectively. The Mixer also draws 3.5mA from a 3.3V supply.

Design of Bluetooth Receiver Front-end using High Gain Low Noise Amplifier and Microstrip Bandpass Filter (마이크로스트립 대역통과 여파기와 고이득 저잡음 증폭기를 이용한 블루투스 리시버 전반부 설계)

  • 손주호;최성열;윤창훈
    • Journal of Korea Multimedia Society
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    • v.6 no.2
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    • pp.352-359
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    • 2003
  • In this paper, we designed the bluetooth receiver using the microstrip bandpass filter and the high gain low noise amplifier with the 0.2$\mu\textrm{m}$ CMOS technology. A cascode inverter is adopted to implement the low noise amplifier and is one stage amplifier with a voltage reference and without the choke inductor. The designed 2.4GHz LNA was achieved a power gain of 18dB, a noise figure of 2.8dB, and the power consumption of 255mW at 2.5V power supply. Also, the microstrip receiver bandpass filter was designed that the center frequency was 2.45GHz, the bandwidth was 4% and the insert attenuation was -1.9dB. When the microstrip bandpass filter and LNA was simulated together the power gain was 16.3dB.

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Implementation of Ka-band Satellite Broadcasting/LNB with High Dynamic Range (Ka-band 고감도 위성방송용/LNB 최적화 설계)

  • Mok, Gwang-Yun;Lee, Kyung-Bo;Rhee, Young-Chul
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.66-69
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    • 2016
  • In this paper, we suggests a Ka-band LNB considering next-generation UHD satellite TVRO. Since Ka-band has grater attenuation than Ku-band in atmosphere, we designed the low-noise down-converter to improve receiving sensitivity and to extend a dynamic range of receiver. It aims to compensate a quality of ultra high definition transmission signal for rainfall. The low-noise block diagram consists of a three-staged amplifier (LNA), band-pass filter for deleting image (BPF), mixer and IF when considering nonlinear characteristics in the receiver RF front end module. Also, we showed a LNB through optimization processes affecting dynamic range directly in receiver FEM. Asa resuly of experiment, the gain of low-noise down-converter show between 58.5dB and 60.7dB, the noise figure has a high characteristic as 1.38dB. Finally, the phase noise of local oscillator is -63.10dBc at 100MHz offset frequency.

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Design and Fabrication of the Cryogenically Cooled LNA Module for Radio Telescope Receiver Front-End (전파 망원경 수신기 전단부용 극저온 22 GHz 대역 저잡음 증폭기 모듈 설계 및 제작)

  • Oh Hyun-Seok;Lee Kyung-Im;Yang Seong-Sik;Yeom Kyung-Whan;Je Do-Heung;Han Seog-Tae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.3 s.106
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    • pp.239-248
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    • 2006
  • In this paper, the cryogenically cooled low noise amplifier module for radio telescope receiver front-end using pHE-MT MMIC is designed and fabricated. In the selection of MMIC, the MMIC fabricated with the pHEMTS providing successful cryogenic operation are chosen. They are mounted in the housing using the thin film substrate. In the design of the housing, the absorber and the elimination of the gap between the carrier and the housing as well removed the unnecessary oscillations by its structure. The mismatch is improved by ribbon-tuning to provide the best performance at room temperature. The fabricated module shows the gain of $35dB{\pm}1dB$ and the noise figure of $2.37{\sim}2.57dB$ at room temperature over $21.5{\sim}23.5GHz$. In the cryogenic temperature of $15^{\circ}K$ cooled by He gas, the measured gain was above 35 dB and flatness ${\pm}2dB$ and the noise temperatures of $28{\sim}37^{\circ}K$.

Compensation of OFDM Signal Degraded by Phase Noise and IQ Imbalance (위상 잡음과 직교 불균형이 있는 OFDM 수신 신호의 보상)

  • Ryu, Sang-Burm;Kim, Sang-Kyun;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.9
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    • pp.1028-1036
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    • 2008
  • In the OFDM system, IQ imbalance problem happens at the RF front-end of transceiver, which degrades the BER(bit error rate) performance because it affects the constellation in the received signal. Also, phase noise is generated in the local oscillator of transceivers and it destroys the orthogonality between the subcarriers. Conventional PNS algorithm is effective for phase noise suppression, but it is not useful anymore when there are jointly IQ(In-phase and Quadrature) imbalance and phase noise. Therefore, in this paper, we analyze the effect of IQ imbalance and phase noise generated in the down-conversion of the receiver. Then, we estimate and compensate the IQ imbalance and phase noise at the same time. Compared with the conventional method that IQ imbalance after IFFT is estimated and compensated in front of FFT via the feedback, this proposed method extracts and compensates effect of IQ imbalance after FFT stage. In case IQ imbalance and phase noise exist at the same time, we can decrease complexity because it is needless to use elimination of IQ imbalance in time domain and training sequences and preambles. Also, this method shows that it reduces the ICI and CPE component using adaptive forgetting factor of MMSE after FFT.