• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.389-392
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• 1999

We employed cobalt-disilicide for high-speed logic devices. We prepared stable and low resistant $CoSi_2$ through typical fabrication process including wet cleaning and rapid thermal process (RTP). We sputtered 15nm thick cobalt on the wafer and performed RTP annealing 2 times to obtain 60nm thick $CoSi_2$. We observed spherical shape voids with diameter of 40nm in the surface and inside $CoSi_2$ layers. The voids resulted in taking over abnormal junction leakage current and contact resistance values. We report that the voids in $CoSi_2$ layers are resulted from surface pits during the ion implantation previous to deposit cobalt layer. Silicide reaction rate around pits was enhanced due to Gibbs-Thompson effects and the volume expansion of the silicidation of the flat active regime trapped dimples. We confirmed that keeping the buffer oxide layer during ion implantation and annealing the silicon surface after ion implantation were required to prevent void defects in CoSi$_2$ layers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.80-80
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• 2009

Recently, multiferroics have attracted much attention due to their numorous potentials. In this work, we attemped to utilize the multiferroics as an alternative material for ferroelectrics. Ferroelectric materials have been stadied to ferroelectric random access memories, however, some inevitable problems prevent it from inplementation. multiferroics shows a ferroelectricity and has low process temperature $BiFeO_3$(BFO) films have good ferroelectric properties but poor leakage characterization. Thus we tried, in this work, to adopt $HfO_2$ insulating layer for metal-ferroelectric-insulator-semiconductor(MFMIS) structure to surpress to leakage current. $BiFeO_3$(BFO) thin films were fabricared by using a sol-gel method on $HfO_2/Si$ structure. Ferroelectric BFO films on a p-type Si(100)wafer with a $HfO_2$ buffer layer have been fabricated to form a metal-ferroelectric-insulator-semiconductor (MFIS) structure. The $HfO_2$ insulator were deposited by using a sol-gel method. Then, they were carried out a rapid thermal annealing(RTA) furnace at $750\;^{\circ}C$ for 10 min in $N_2$. BFO films on the $HfO_2/Si$ structures were deposited by sol-gel method and they were crystallized rapid thermal annealing in $N_2$ atomsphere at $550\;^{\circ}C$ for 5 min. They were characterized by atomic force microscopy(AFM) and Capacitance-voltage(C-V) curve.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.6
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• pp.55-65
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• 1998

In industrial fields, RTP(rapid thermal processing) system is widely used for improving the oxidation and the annealing in semiconductor manufacturing process. The main control factors are temperature control of wafer and uniformity in the wafer. In this paper, we propose an $H^{\infty}$ controller design of RTP system satisfying robust stability and performance using weighted mixed sensitivity miniimization and loop shaping technique. And we need reduction technique because of the difficulty of implementation with the obtained high order controller for original model and reduced models, namely, Hankel, square-root balanced, and Schur balanced methods. An example is proposed to show the validity of the proposed method.

• Journal of the Korean Vacuum Society
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• v.17 no.2
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• pp.156-159
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• 2008

The electrical characteristic of SiGe-on-SOI (SGOI) wafer with different Ge concentration were evaluated by pseudo-MOSFET. Epitaxial SiGe layers was grown directly on top of SOI with Ge concentrations of 16.2, 29.7, 34.3 and 56.5 at.%. As Ge concentration increased, leakage current increased and threshold voltage shifted from 3 V to 7 V in nMOSFET, from -7 V to -6 V in pMOSFET. The interface states between buried oxide and top of Si was significantly increased by the rapid thermal annealing (RTA) process, and so the electrical characteristic of SGOI wafer degraded. On the other hand, additional post RTA　annealing (PRA) showed that it was effective in decreasing the interface states generated by RTA processes and the electrical characteristic of SGOI wafer enhanced higher than initial state.

• Korean Journal of Materials Research
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• v.31 no.11
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• pp.619-625
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• 2021

Cu₂ZnSn(S,Se)₄ (CZTSSe) based thin-film solar cells have attracted growing attention because of their earth-abundant and non-toxic elements. However, because of their large open-circuit voltage (V_oc)-deficit, CZTSSe solar cells exhibit poor device performance compared to well-established Cu(In,Ga)(S,Se)₂ (CIGS) and CdTe based solar cells. One of the main causes of this large V_oc-deficit is poor absorber properties for example, high band tailing properties, defects, secondary phases, carrier recombination, etc. In particular, the fabrication of absorbers using physical methods results in poor surface morphology, such as pin-holes and voids. To overcome this problem and form large and homogeneous CZTSSe grains, CZTSSe based absorber layers are prepared by a sputtering technique with different RTA conditions. The temperature is varied from 510 ℃ to 540 ℃ during the rapid thermal annealing (RTA) process. Further, CZTSSe thin films are examined with X-ray diffraction, X-ray fluorescence, Raman spectroscopy, IPCE, Energy dispersive spectroscopy and Scanning electron microscopy techniques. The present work shows that Cu-based secondary phase formation can be suppressed in the CZTSSe absorber layer at an optimum RTA condition.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.21-25
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• 2001

In this study, recovery of plasma etching· damage in PZT thin film with additive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of $Cl_2/CF_4$ with addition of Ar and $O_2$ with inductively induced plasma. The etch rates of PZT thin films were 1450 $\AA$/min at 30% additive Ar into $(Cl_2(80%)+CF_4 (20%))$ and 1100 $\AA$/min at 10% additive $O_2$ into $C(Cl_2(80%)+CF_4(20%))$. In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in at $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x-ray photoelectron spectroscopy (XPS) analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of $Ti_xO_y$ is recovered by $O_2$ recombination during rapid thermal annealing process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.319-324
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• 2002

In this study, the reduce of plasma etching damage in PZT thin film with addictive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of $Cl_2/CF_4$ with addition of Ar and $O_2$ with inductively coupled plasma. The etch rates of PZT thin films were 1450 ${\AA}/min$ at 30% additive Ar and 1100 ${\AA}/min$ at 10% auditive $O_2$ into $Cl_2/CF_4$ gas mixing ratio of 8/2. In order to reduce plasma damage of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures at $O_2$ atmosphere. From the hysteresis curries, the ferroelectric properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed PZT films is consistent wish the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x ray photoelectron spectroscopy (XPS) analysis, the intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of $Ti_xO_y$ is recovered by $O_2$ recombination during rapid thermal annealing process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.21-25
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• 2001

In this study, recovery of plasma etching damage in PZT thin film with additive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of Cl$_2$/CF$_4$ with addition of Ar and $O_2$ with inductively induced plasma. The etch rates of PZT thin films were 1450$\AA$/min at 30% additive Ar into (Cl$_2$(80%)+CF$_4$ (20%)) and 1100$\AA$/min at 10% additive $O_2$ into C(Cl$_2$(80%)+CF$_4$ (20%)). In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in at $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x-ray photoelectron spectroscopy (XPS) analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of Ti$_{x}$O$_{y}$ is recovered by $O_2$ recombination during rapid thermal annealing process.s.s.

• Korean Journal of Materials Research
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• v.17 no.9
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• pp.453-457
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• 2007

Interest in use of ink-jet printing for pattern-on-demand fabrication of metal interconnects without complicated and wasteful etching process has been on rapid increase. However, ink-jet printing is a wet process and needs an additional thermal treatment such as an annealing process. Since a metal ink is a suspension containing metal nanoparticles and organic capping molecules to prevent aggregation of them, the microstructure of an ink-jet printed metal interconnect 'as dried' can be characterized as a stack of loosely packed nanoparticles. Therefore, during being treated thermally, an inkjet-printed interconnect is likely to evolve a characteristic microstructure, different from that of the conventionally vacuum-deposited metal films. Microstructure characteristics can significantly affect the corresponding electrical and mechanical properties. The characteristics of change in microstructure and electrical resistivity of inkjet-printed silver (Ag) films when annealed isothermally at a temperature between 170 and $240^{\circ}C$ were analyzed. The change in electrical resistivity was described using the first-order exponential decay kinetics. The corresponding activation energy of 0.44 eV was explained in terms of a thermally-activated mechanism, i.e., migration of point defects such as vacancy-oxygen pairs, rather than microstructure evolution such as grain growth or change in porosity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.392-397
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• 2011

The effect of various post-annealing temperature to sputtered Pb(Zr,Ti)$O_3$ (PZT) thin films was investigated. The crystallization process, surface morphology and the electrical characteristics strongly depends on the rapid thermal annealing (RTA). In radio frequency (RF) sputtering methods, there were many papers mostly forcing on the crystal forming and the surface variations with different elements distribution (Pb, Ti, Zr, O) on the surface of the PZT layer. In this experiment, the post-annealing treatment promoted the Pb volatilization in PZT thin film and affected the Ti diffused throughout the Pt layer into the PZT layer. Second ion mass spectroscopy (SIMS) analysis was employed to show that the Pb element in the PZT layer was decreased at the same time the Ti element mass was slight decreased than Pb with increasing RTA temperature. That result prove the content of Pb affect the PZT thin film property.