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http://dx.doi.org/10.5757/JKVS.2008.17.2.156

Evaluation of SGOI wafer with different concentrations of Ge using pseudo-MOSFET  

Park, Goon-Ho (Department of Electronic Materials Engineering, Kwangwoon Univ.)
Jung, Jong-Wan (Department of Nano-Sci & Tech., Sejong Univ.)
Cho, Won-Ju (Department of Electronic Materials Engineering, Kwangwoon Univ.)
Publication Information
Journal of the Korean Vacuum Society / v.17, no.2, 2008 , pp. 156-159 More about this Journal
Abstract
The electrical characteristic of SiGe-on-SOI (SGOI) wafer with different Ge concentration were evaluated by pseudo-MOSFET. Epitaxial SiGe layers was grown directly on top of SOI with Ge concentrations of 16.2, 29.7, 34.3 and 56.5 at.%. As Ge concentration increased, leakage current increased and threshold voltage shifted from 3 V to 7 V in nMOSFET, from -7 V to -6 V in pMOSFET. The interface states between buried oxide and top of Si was significantly increased by the rapid thermal annealing (RTA) process, and so the electrical characteristic of SGOI wafer degraded. On the other hand, additional post RTA　annealing (PRA) showed that it was effective in decreasing the interface states generated by RTA processes and the electrical characteristic of SGOI wafer enhanced higher than initial state.
Keywords
SGOI; SiGe-on-SOI; compressive SiGe; Pseudo MOSFET;
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