• Korean Journal of Metals and Materials
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• v.46 no.11
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.771-780
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• 2001

It is indispensable to use the process and device simulation tool in order to analyze accurately the electrical characteristics of ULSI CMOS devices, in addition to developing and manufacturing those devices. The 3D Monte Carlo (MC) simulation result is not efficient for large-area application because of the lack of simulation particles. In this paper is reported a new efficient simulation strategy for 3D MC ion implantation into large-area application using the 3D MC code of TRICSI(TRansport Ions into Crystal Silicon). The strategy is related to our newly proposed split-trajectory method and ion-splitting method(ion-shadowing approach) for 3D large-area application in order to increase the simulation ions, not to sacrifice the simulation accuracy for defects and implanted ions. In addition to our proposed methods, we have developed the cell based 3D interpolation algorithm to feed the 3D MC simulation result into the device simulator and not to diverge the solution of continuous diffusion equations for diffusion and RTA(rapid thermal annealing) after ion implantation. We found that our proposed simulation strategy is very computationally efficient. The increased number of simulation ions is about more than 10 times and the increase of simulation time is not twice compared to the split-trajectory method only.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.131-131
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• 2013

A single-layer graphene has been uniformly grown on a Cu surface at elevated temperatures by thermally processing a poly(methyl methacrylate) (PMMA) film in a rapid thermal annealing (RTA) system under vacuum. The detailed chemistry of the transition from solid-state carbon to graphene on the catalytic Cu surface was investigated by performing in-situ residual gas analysis while PMMA/Cu-foil samples being heated, in conjunction with interrupted growth studies to reconstruct ex-situ the heating process. The data clearly show that the formation of graphene occurs with hydrocarbon molecules vaporized from PMMA, such as methane and/or methyl radicals, as precursors rather than by the direct graphitization of solid-state carbon. We also found that the temperature for vaporizing hydrocarbon molecules from PMMA and the length of time the gaseous hydrocarbon atmosphere is maintained, which are dependent on both the heating temperature profile and the amount of a solid carbon feedstock are the dominant factors to determine the crystalline quality of the resulting graphene film. Under optimal growth conditions, the PMMA-derived graphene was found to have a carrier (hole) mobility as high as ~2,700 cm2V-1s-1 at room temperature, superior to common graphene converted from solid carbon.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.528-537
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• 2008

60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.