• Journal of the Korean Institute of Telematics and Electronics
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• v.4 no.4
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• pp.2-12
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• 1967

A pair of insulated-gate metal-oxide-semiconductor field-effect transistor has been used to measure the direct current produced from the ionization chamber in the range of to A. An analisis of direct-current differential amplifier giving the expressions of the common-mode rejection ratio and the rralization of the constant-current generator to give very large effective source resistance has been presented. Voltage gain is 6.6, drift at the room temperature is 1.5mv per day. The common-mode rejection ratio is obtained maximum 84db. These facts give the feasibility of small direct-current measurements by utilizing this type transistors.

• Journal of the Korea Institute of Military Science and Technology
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• v.26 no.4
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• pp.324-334
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• 2023

In this paper, the target simulator for RF signals was developed by using VST(Vector Signal Transceiver) and set by real-time signal processing SW programs. A function to process RF signals using FPGA(Field Programmable Gate Array) board was designed. The system functions capable of data processing, raw signals monitoring, target signals(simulated range, velocity) generating and RF environments data analyzing were implemented. And the characteristics of modulated signal were analyzed in RF environment. All function of programs for processing RF signal have options to store signal data and to manage the data. The validity of the signal simulation was confirmed through verification of simulated signal results.

• Journal of Astronomy and Space Sciences
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• v.32 no.3
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• pp.209-219
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• 2015

The Accurate Ranging System for Geodetic Observation - Mobile (ARGO-M) was successfully developed as the first Korean mobile Satellite Laser Ranging (SLR) system in 2012, and has joined in the International Laser Ranging Service (ILRS) tracking network, DAEdeoK (DAEK) station. The DAEK SLR station was approved as a validated station in April 2014, through the ILRS station "data validation" process. The ARGO-M system is designed to enable 2 kHz laser ranging with millimeter-level precision for geodetic, remote sensing, navigation, and experimental satellites equipped with Laser Retro-reflector Arrays (LRAs). In this paper, we present the design and development of a next generation high-repetition-rate SLR system for ARGO-M. The laser ranging rate up to 10 kHz is becoming an important issue in the SLR community to improve ranging precision. To implement high-repetition-rate SLR system, the High-repetition-rate SLR operation system (HSLR-10) was designed and developed using ARGO-M Range Gate Generator (A-RGG), so as to enable laser ranging from 50 Hz to 10 kHz. HSLR-10 includes both hardware controlling software and data post-processing software. This paper shows the design and development of key technologies of high-repetition-rate SLR system. The developed system was tested successfully at DAEK station and then moved to Sejong station, a new Korean SLR station, on July 1, 2015. HSLR-10 will begin normal operations at Sejong station in the near future.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.6
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• pp.742-750
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• 2018

In this paper, in order to enable zero-layer FTP cell using only 5V MOS devices on the basis of $0.13{\mu}m$ BCD process, the tunnel oxide thickness is used as the gate oxide thickness of $125{\AA}$ of the 5V MOS device at 82A. The HDNW layer, which is the default in the BCD process, is used. Thus, the proposed zero layer FTP cell does not require the addition of tunnel oxide and DNW mask. Also, from the viewpoint of memory IP design, a single memory structure which is used only for trimming analog circuit of PMIC chip is used instead of the dual memory structure dividing into designer memory area and user memory area. The start-up circuit of the BGR (Bandgap Reference Voltage) generator circuit is designed to operate in the voltage range of 1.8V to 5.5V. On the other hand, when the 64-bit FTP memory IP is powered on, the internal read signal is designed to maintain the initial read data at 00H. The layout size of the 64-bit FTP IP designed using the $0.13-{\mu}m$ Magnachip process .is $485.21{\mu}m{\times}440.665{\mu}m$($=0.214mm^2$).