• Korean Journal of Materials Research
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• v.2 no.4
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• pp.285-292
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• 1992

Ultrathin(8nm) oxynitride (SiOxNy) film have been formed on Si(100) by rapid thermal processing(RTP) in $O_2$and $N_2$O as reactants. Compared with conventional furnace $O_2$ oxide, the oxynitride dielectrics shows better characteristics of I-V and TDDB, and less flat-band voltage shift. The oxynitride has a behavior of Fowler-Nordheim tunneling in the region of V 〉${\varphi}_0$ simialr to pure Si$O_2$oxide. The relative dielectric constant of oxynitride is higher than that of conventional pure oxide. Excellent diffusion harrier property to dopant(B$F_2$) is also observed. Nitrogen depth profiles by SIMS, AES, and XPS show nitrogen pile - up at Si$O_2$/Si interface, which can explain the improved properties of oxynitride dielectrics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.11-16
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• 2008

In this paper, firstly we made of the rapid thermal processor equipment with the specifically useful structure to measure wafer stress. Secondly we made of the laser interferometry to inspect the wafer surface curvature based on the large deformation theory. And then the wafer surface fringe image was obtained by experiment, and the full field stress distribution of wafer surface comes into view by signal processing with thining and pitch mapping. After wafer was ground by 1mm and polished from the back side to get easily deformation, and it was heated by three to four times thermal treatments at about 1000 degree temperature. Finally the severe deformation between wafer before and after the heat treatment was shown.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.789-794
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• 1986

The current-voltage characteristics of ion-implanted GaAs MESFET's have been simulated by using the velocity saturation model. Using this model, a MESFET with threshold voltage of -0.5V and transconductance of 460 mS/mm is designed. To implement high transconductance MESFET's, low energy ion-implantation (20 keV) and RTP(Rapid Thermal Process) activation ($575^{\circ}C$, 5sec) processes are required.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.202-205
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• 2002

Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently future high-resolution, high-performance flat panel display technology However, it was very difficult to fabricate high performance poly-Si TFTs at a temperature lower than 300$^{\circ}C$ for glass substrate. Conventional process on a glass substrate were limited temperature less than 600$^{\circ}C$ This paper proposes a high temperature process above 750$^{\circ}C$ using a flexible molybdenum substrate deposited hydrogenated amorphous silicon (a-Si:H) and than crystallized a rapid thermal processor (RTP) at the various temperatures from 750$^{\circ}C$ to 1050$^{\circ}C$. The high temperature annealed poly-Si film illustrated field effect mobility higher than 30 $\textrm{cm}^2$/Vs, achieved I$\sub$on//I$\sub$off/ current ratio of 10$^4$ and crystall volume fraction of 92%. In this paper, we introduce the new TFTs Process as flexible substrate very promising roll-to-roll process, and exhibit the properties of high temperature crystallized poly-Si Tn on molybdenum substrate.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.19 no.6
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• pp.298-304
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• 2009

The effect of the surface treatments on the high temperature properties of the Inconel 617, one of the promising candidate alloys for high temperature heat-transport system, has been studied. Various surface modification methods including a rapid thermal process(RTP), a hydrothermal treatment, and a physical vapor deposition($2{\mu}m$ thick TiAlN film by an arc discharge) were applied to the Inconel 617. The morphological and the structural properties of the surface-modified Inconel 617 samples after heat treatment at $1000^{\circ}C$ in the air were compared to find out whether inhomogeneous formation of $Cr_2O_3$ crust at the surface region was suppressed or not. TiAlN-coated Inconel 617 showed homogeneous microstructure and the lowest wear loss compared to bare, RTP- and hydrothermally-treated Inconel 617 by suppressing the $Cr_2O_3$ crust formation.

• International Journal of Control, Automation, and Systems
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• v.6 no.2
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• pp.160-170
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• 2008

Temperature control of an enclosed thermal system which has many applications including Rapid Thermal Processing (RTP) of semiconductor wafers showed an input-constraint violation for nonlinear controllers due to inherent strong coupling between the elements [1]. In this paper, a constrained nonlinear optimal control design is developed, which accommodates input constraints using the linear algebraic equivalence of the nonlinear controllers, for the temperature control of an enclosed thermal process. First, it will be shown that design of nonlinear controllers is equivalent to solving a set of linear algebraic equations-the linear algebraic equivalence of nonlinear controllers (LAENC). Then an input-constrained nonlinear optimal controller is designed based on that LAENC using the constrained linear least squares method. Through numerical simulations, it is demonstrated that the proposed controller achieves the equivalent performances to the classical nonlinear controllers with less total energy consumption. Moreover, it generates the practical control solution, in other words, control solutions do not violate the input-constraints.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.985-988
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• 2004

The carrier lifetime of boron doped Cz silicon samples after light induced degradation could be improved by optimized rapid thermal processing (RTP). The important five different parameters varied in order to investigate which parameter is important for the stable lifetime after light induced degradation, $\tau_d$. The Plateau temperature and the Plateau time influenced on the lifetime after light induced degradation. Especially, the Plateau temperature showed a strong influence on the stable lifetime. The optimal plateau temperature is approximately $900^{\circ}C$ t for a plateau time of 120 s. The stable lifetime increased from $15\mu}s$ to $25.5{\mu}s$. The normalized defect concentration, $N_t^*$, decreased from $0.06{\mu}s^{-1}$ to $0.037{\mu}s^{-1}$ by RTP-process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.105-106
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• 2008

Structural, optical and electrical properties of CdS films deposited by chemical bath deposition (CBD), which are a very attractive method for low-cost and large-area solar cells, are presented. Cadmium sulfide (CdS) is II-VI semiconductor with a wide band gap of approximately 2.42 eV. CdS films have a great application potential such as solar cell, optical detector and optoelectronics device. In this paper, effects of Rapid Thermal Process (RTP) on the properties of CdS films were investigated. The CdS films were prepared on a glass by chemical bath deposition (CBD) and subsequently annealed at standard temperature $(400^{\circ}C)$ and treatment time (10 min) in various atmospheres (air, vacuum and $N_2$). The CdS films treated RTP in $N_2$ for to min were showed larger grain size and higher carrier density than the other samples.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.2
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• pp.299-306
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• 1998

Crystallization of the amorphous silicon needs activation. Thermal energy through laser annealing, furnace annealing and rapid thermal process (RTP) has been convinced to crystallize the amorphous silicon thin film. It is expected that some other type of energy like mechanical energy can help to crystallize the amorphous silicon thin film. In this study, mechanical energy through wet blasting of silica slurry and silicon ion implantation has been applied to the amorphous silicon thin film deposited with LPCVD technique. RTP was employed for the annealing of this mechanically-damaged amorphous silicon thin film. For the characterization of the crystallized silicon thin film, XRD and Raman analysis were conducted. In this study, it is shown that the mechanical damage is effective to enhance the crystallization of amorphous silicon thin film.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.675-678
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• 2003

본 논문에서는 N-type 기판에서 Nickel-Silicide를 적용하였을 경우에 나타나는 문제점과 PAI (Pre-amorphization Implant)의 효과에 대하여 알아보았다. N-type 기판에 RTP (Rapid Thermal Process)를 통하여 Nickel-Silicide 를 형성하게 되는데, 여기까지는 안정한 Nickel mono-Silicide (NiSi)가 형성됨을 확인하였다. 하지만 후속 열처리 공정 후 심한 응집 현상 (Agglomeration)과 이상 산화 현상 (Abnormal Oxidation Phenomenon), Silicide Island 등 열안정성 (Thermal Stability) 측면에서 여러 가지 많은 문제점들이 나타났다. 이 후속 열처리의 열안정성 취약점들을 극복하는 방안으로 Ge 및 N₂ PAI를 적용하였다. PAI를 적용하였을 경우에는 그렇지 않은 경우에 비하여 고온 열처리 후에도 면저항이 비교적 잘 유지되었으며, 두께가 얇고 안정한 Nickel-Silicide 특성을 확보할 수 있었다. 특히 Ge PAI 에 비하여 N₂ PAI 의 경우가 보다 특성 개선 효과가 크게 나타났다.