• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.78-85
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• 2008

This paper presents a high-level design methodology applied on an SoC using SystemC. The topic will emphasize on high-level design approach for intensive architecture exploration and verifying cycle accurate SystemC models comparative to real Verilog RTL models. Unlike many high-level designs, we started the poject with working Verilog RTL models in hands, which we later compared our SystemC models to real Verilog RTL models. Moreover, we were able to use the on-chip test board performance simulation data to verify our SystemC-based platform. This paper illustrates that in high-level design, we could have the same accuracy as RTL models but achieve over one hundred times faster simulation speed than that of RTL's. The main topic of the paper will be on architecture exploration in search of performance degradation in source.

• The Magazine of the IEIE
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• v.29 no.1
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• pp.66-72
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• 2002

VLSI 기술의 발전은 보다 많은 양의 로직을 단일 칩에 집적 가능하게 했고, 이는 System-on-a-chip 시대의 도래를 가능하게 했다. System-on-a-chip을 가능하게 하기 위해서는 많은 종류의 IP (Intellectual Property)가 필요하고, 공정 변환을 쉽게 하기 위해서는 합성이 가능한 RTL 설계가 절실히 요구된다. 본 논문은 이러한 요구에 부응하기 위해서 hard macro 형태의 기존의 IP로 부터 합성 가능한 IP를 자동 생성해 주는 ART(Automatic RTL Translation)로 명명된 기법에 관한 것이다. 제안된 ART 기법을 이용하여 80C52 호환의 8-bit MCU(Micro-controller Unit)의 합성 가능한 RTL model을 자동 생성하였고, 개발된 Soft IP를 이용하여 TCP/IP 전용 MCU를 표함해서 다양한 제품들을 개발하였다.

• Journal of Korean Tunnelling and Underground Space Association
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• v.18 no.3
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• pp.331-339
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• 2016

Real time location (RTL) system which can control the safety of laborers in the underground space is developed in this study. This innovative system can monitor the location and history of movement of multiple laborers in real time. To accommodate constrains of the underground space, the system is portable and composed with low-battery mode. Since conventional method to detect the location of laborer with radio signal strength indicator (RSSI) contains high errors, new measurement system using accelerometers and correction method are suggested in this study. Field test is performed to validate the developed system. The error for moving laborer was 0.4 m and for non-moving laborers was 0.2 m. Thus, it is found that the new RTL system can be used to monitor the location of laborers in the underground construction space.

• Proceedings of the IEEK Conference
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• summer
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• pp.285-288
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• 2004

In this paper, we present a design and experiment of PCI Express core verification model. The model targeting Endpoint core based on Verilog HDL is designed by newly-emerging SystemC, which is a new C++ class library based system design approach. In the verification model, we designed and implemented a SystemC host system model which acted as Root Complex and device driver dedicated to the PCI Express Endpoint RTL core. The verification process is scheduled by scenarios which are implemented in host model. We show that the model is useful especially for verifying the RTL model which has dependencies on system software.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1157-1160
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• 2003

We proposed a study on optimal clock period selection algorithm for low power RTL design. The proposed algorithm use the way of maintaining the throughput by reducing supply voltage after improve the system performance in order to minimize the power consumption. In this paper, it select the low power to use pipeline in the transformation of architecture. Also, the algorithm is important the clock period selection in order to maximize the resource sharing. however, it execute the optimal clock period selection algorithm.

• Proceedings of the Korean Information Science Society Conference
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• 2008.06d
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• pp.424-427
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• 2008

최근 산업용 로봇에서부터 청소 로봇과 지능형 서비스 로봇에 이르기까지 주행 기능을 갖고 있지만, 제한된 상황에서의 단순한 주행 기능이 거의 대부분이다. 로봇이 복잡한 환경에서 자율 주행 하기 위해서는 로봇의 위치인식이 되어야 가능하다. 지금까지 많은 기술들이 나와 있지만 비교적 고가의 장비로 구현되어야 한다는 단점을 가지고 있다. 따라서 본 논문에서는 IEEE 802.15.4a 기반에 CSS (Chirp Spread Spectrum) 방식의 RTLS를 로봇 위치추적에 사용함으로 낮은 가격에 로봇의 위치 추적이 가능한 방법을 제안한다. 이를 위해 RTLS 모듈을 제작하였고, 로봇의 위치제어에 사용하였다. RTLS를 적용한 로봇은 비용적인 측면에서 비교적 낮은 가격에 로봇의 현재 위치를 얻을 수 있는 장점을 가지며, 충돌감지 센서와 같은 센서를 통해 간편하게 지도를 작성할 수 있다는 장점이 있다. 또 앞으로 여러 대의 로봇을 동시에 사용하는 환경에서도 각각의 로봇이 위치를 인식하기 위해 드는 비용을 줄임으로 실제 저가의 로봇에 적용 가능할 것이다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.3
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• pp.555-562
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• 2008

In this paper we proposed a practical low-power design technique using clock-gating in RTL. An efficient low-power methodology is that a high-level designer analyzes a generic system and designs a controller for clock-gating. Also the desirable flow is to derive clock-gating in normal synthesis process by synthesis tool than to insert directly gate to clock line. If low-power is considered in coding process, clock is gated in coding process. If not considered, after analyzing entire operation. clock is Bated in periods of holding data. After analyzing operation for clock-gating, a controller was designed for it, and then a low-power circuit was generated by synthesis tool. From result, we identified that the consumed power of register decreased from 922mW to 543mW, that is the decrease rate is 42%. In case of synthesizing the test circuit using synthesizer of Power Theater, it decreased from 322mW to 208mW (36.5% decrease).

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.1
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• pp.92-99
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• 2005

In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

• International Journal of Aeronautical and Space Sciences
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• v.18 no.4
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• pp.675-687
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• 2017

In the aerospace industry, we have produced various models according to operational conditions and the environment after development of the base model is completed. Therefore, when design change is necessary, there are modification and updating costs of the circuit whenever environment variables change. For these reasons, recently, in various fields, system designs that can flexibly respond to changing environmental conditions using field programmable gate arrays (FPGAs) are attracting attention, and the rapidly changing aerospace industry also uses FPGAs to organize the system environment. In this paper, we design the controller area network (CAN) intellectual property (IP) protocol used instead of the avionics protocol that includes ARINC-429 and MIL-STD-1553, which are not suitable for small unmanned aerial vehicle (UAV) systems at the register transistor logic (RTL) level, which does not depend on the FPGA vender, and we verify the performance. Consequentially, a Spartan 6 FPGA model-based system on chip (SoC) including an embedded system is constructed by using the designed CAN communications IP and Xilinx Microblaze, and the configured SoC only recorded an average 32% logic element usage rate in the Spartan 6 FPGA model.

• Journal of Korea Spatial Information System Society
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• v.10 no.4
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• pp.47-58
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• 2008

With the recent development of the ubiquitous computing technology, there are increasing interest and research in technologies such as sensors and RFID related to information recognition and location positioning in various ubiquitous fields. Especially, a standard specification was required for compatibility and interoperability in various RTLS(Real-Time Locating Systems) according to the development of RTLS to provide location and status information of moving objects using the RFID Tag. For these reasons, the ISO/IEC published the RTLS standard specification for compatibility and interoperability in RTLS. Therefore, in this paper, we designed and im plemented RTLS based on the spatial DSMS(Data Stream Management Stream) for efficiently managing and searching the incoming data stream of moving objects. The spatial DSMS is an extended system of STREAM(STanford stREam datA Manager) developed by Standford University to make various spatial operations possible. RTLS based on the spatial DSMS uses the SOAP(Simple Object Access Protocol) message between client and server for interoperability and translates client's SOAP message into CQL(Continuous Query Language) of the spatial DSMS. Finally, we proved the efficiency of RTLS based on the spatial DSMS by applying it for the staff location management service.