• Journal of Power Electronics
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• v.17 no.4
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• pp.1004-1013
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• 2017

This paper presents an interleaving scheme for parallel-connected power systems to reduce the DC-link current ripple. A paralleled generator system generates current ripple by the Pulse Width Modulation (PWM) of each generator side converter. The current ripple in the DC-link degrades the efficiency of the whole generator system and decreases the lifetime of the DC-link capacitors. To mitigate these issues, the expression of the DC-link current is derived by a double-integral Fourier analysis while considering the modulation schemes. Optimized interleaving angles for the parallel generator system are obtained based on an analysis to minimize the dominant current harmonics component. Finally, the proposed interleaving scheme reduces the RMS value of the DC-link current ripple. Simulation and experimental results verify the effectiveness of the proposed interleaving scheme.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.129-140
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• 2017

In this paper, a $4{\times}32$-channel neural recording system capable of acquiring neural signals is introduced. Four 32-channel neural recording ICs, complex programmable logic devices (CPLDs), a micro controller unit (MCU) with USB interface, and a PC are used. Each neural recording IC, implemented in $0.18{\mu}m$ CMOS technology, includes 32 channels of analog front-ends (AFEs), a 32-to-1 analog multiplexer, and an analog-to-digital converter (ADC). The mid-band gain of the AFE is adjustable in four steps, and have a tunable bandwidth. The AFE has a mid-band gain of 54.5 dB to 65.7 dB and a bandwidth of 35.3 Hz to 5.8 kHz. The high-pass cutoff frequency of the AFE varies from 18.6 Hz to 154.7 Hz. The input-referred noise (IRN) of the AFE is $10.2{\mu}V_{rms}$. A high-resolution, low-power ADC with a high conversion speed achieves a signal-to-noise and distortion ratio (SNDR) of 50.63 dB and a spurious-free dynamic range (SFDR) of 63.88 dB, at a sampling-rate of 2.5 MS/s. The effectiveness of our neural recording system is validated in in-vivo recording of the primary somatosensory cortex of a rat.

• Journal of Sensor Science and Technology
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• v.9 no.4
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• pp.288-296
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• 2000

Thin-film chromel-alumel multijunction thermal converters with a low output resistance of $64{\sim}85\;{\Omega}$ showed approximately the square law-dependent input-output relation. The voltage responsivities were very low with $0.34{\sim}0.67\;V/W$ in air and $1.15{\sim}1.48\;V/W$ in vacuum, respectively, and the ac-dc voltage transfer error was very large with about +340 ppm in the frequency range of $40\;Hz{\sim}10\;kHz$ in the case of 1 V-input sinewave rms voltage. It can be concluded that the large transfer error of the thermal converter was mainly caused by the low voltage responsivity and the large heat loss due to low output resistance, which implies that the optimization for small ac-dc transfer error is required.

• Journal of Advanced Navigation Technology
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• v.24 no.6
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• pp.557-565
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• 2020

In order for thermal degradationIn, excore nuclear flux monitoring system, as a monitoring and signal processing methodology of reactor power, monitors neutron pulses generated during nuclear fission as frequency status, and converts them into DC voltage, and then log values resultantly. The methods realy applied in the nuclear power plant are to construct combination of counters and flip-flops, or diodes and capacitors up to now. These methodes are reliable for relative high frequencies, while not credible for reasonable low frequencies or extreme low values. Therefore, we developed the circuit that converts frequencies into DC voltages, into and into log DC values in the wide range from low Hz to several hundred high kHz. We proved their validities through testing them using real data used in nuclear power plant and analyzed their results. And, these methods will be used to measure the neutron level of excore nuclear flux monitoring system in nuclear power plant.

• Journal of Power Electronics
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• v.15 no.3
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• pp.685-694
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• 2015

The power loss of the controllable switches in modular multilevel converter (MMC) HVDC transmission systems is an important factor, which can determine the design of the operating junction temperatures. Due to the dc current component, the approximate calculation tool provided by the manufacturer of the switches cannot be used for the losses of the switches in the MMC. Based on the enabled probabilities of each SM in an arm, the current analytical models of the switches can be determined. The average and RMS currents can be obtained from the corresponding current analytical model. Then, the conduction losses can be calculated, and the switching losses of the switches can be estimated according to the upper limit of the switching frequency. Finally, the thermal resistance model of the switches can be utilized, and the junction temperatures can be estimated. A comparison between the calculation and PSCAD simulation results shows that the proposed method is effective for estimating the junction temperatures of the switches in the MMC.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.766-776
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• 2015

It is well known that series arc faults in Low Voltage DC (LVDC) distribution system occur at unintended points of discontinuity within an electrical circuit. These faults can make circuit breakers not respond timely due to low fault current. It, therefore, is needed to detect the series fault for protecting circuits from electrical fires. This paper proposes a novel scheme to detect the series arc fault using Wavelet Singular Value Decomposition (WSVD) and state diagram. In this paper, the fault detector developed is designed by using three criterion factors based on the RMS value of Singular value of Approximation (SA), Sum of the absolute value of Detail (SD), and state diagram. LVDC distribution system including AC/DC and DC/DC converter is modeled to verify the proposed scheme using ElectroMagnetic Transient Program (EMTP) software. EMTP/MODELS is also utilized to implement the series arc model and WSVD. Simulation results according to various conditions clearly show the effectiveness of the proposed scheme.

• ETRI Journal
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• v.33 no.6
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• pp.897-903
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• 2011

A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.71-73
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• 2007

본 논문에서는 새로운 연료전지용 3상 전류형 능동 클램프 DC-DC 컨버터를 제안한다. 전류형 컨버터 구조에 능동 클램프 회로를 채용하여 과도기에 발생하는 서지전압을 저감하였고 모든 스위치에서 영전압 스위칭을 하며, 그 장점으로 : 연속적인 입력전류, 전압 오버슈트 제거, 영전압 턴 온 스위칭, 고주파 변압기 1차/2차 측에 부가적인 스너버 회로의 필요성 제거, 소프트 스위칭에 의한 저속 다이오드 적용 등이 있다. 더구나 대용량 발전 시스템에 적합하도록 전류형 컨버터 구조와 3상 전력변환 회로를 결합하였다. 3상 전력변환 적용의 장점은 : 입력전류 및 출력전압 주파수의 3배 증가, 스위치에 흐르는 RMS 전류 저감, 필터소자 용량 및 부피 감소, 고주파 변압기 이용률 증가, 전력회로의 단순화에 따른 전체 사이즈 축소 및 신뢰성 향상 등이 있다. 제안하는 3상 전류형 능동 클램프 DC-DC 컨버터는 이러한 장점들 때문에 발전용 연료전지 시스템의 승압형 DC-DC 컨버터에 적합하며 대용량 태양전지 발전 시스템 및 배터리 충전기 등에도 적용할 수 있다. 새로운 3상 DC-DC 컨버터와 함께 3상 PWM 알고리즘을 제안하며, 시뮬레이션과 프로토타입 제작, 실험을 통하여 그 성능을 평가, 확인한다.

• Journal of Power Electronics
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• v.15 no.1
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• pp.18-30
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• 2015

This paper focuses on a systematical and in-depth analysis of the reactive power and soft-switching regions of Dual Active Bridge (DAB) converters with dual-phase-shift (DPS) control to achieve high efficiency in a wide operating range. The key features of the DPS operating modes are characterized and verified by analytical calculation and experimental tests. The mathematical expressions of the reactive power are derived and the reductions of the reactive power are illustrated with respect to a wide range of output power and voltage conversion ratios. The ZVS soft-switching boundary of the DPS is presented and one more leg with ZVS capability is achieved compared with the CPS control. With the selection of the optimal operating mode, the optimal phase-shift pair is determined by performance indices, which include the minimum peak or rms inductor current. All of the theoretical analysis and optimizations are verified by experimental tests. The experimental results with the DPS demonstrate the efficiency improvement for different load conditions and voltage conversion ratios.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.233-234
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• 2017

본 논문에서는 수학적 모델링과 성능 분석을 통해 LVDC 용 3상 Dual Active Bridge (DAB) 컨버터의 효율을 증가시킬 수 있는 다양한 방법에 대해서 제안하고자 한다. 3상 DAB 컨버터의 경우 양방향 전력 변환을 필요로 하는 고전력 응용에서 많이 사용되고 있다. 이는 3상 DAB 컨버터가 영전압 스위칭이 가능할 뿐만 아니라, 단상 DAB 컨버터 대비 낮은 도통 손실을 가질 수 있기 때문이다. 고전압/고전류 응용의 경우 대부분 능동 소자로 IGBT가 사용되는데, 따라서 대전력 응용에서 3상 DAB 컨버터의 영전압 스위칭이 가능한 장점을 퇴색시키고, 높은 스위칭 손실을 야기한다. 뿐만 아니라 3상 DAB 컨버터의 경우 고부하 상태에서 높은 순환 전류로 인해 도통 손실이 증가한다. 따라서 본 논문에서는 상기의 단점을 극복하기 위하여 IGBT의 턴-오프 전류를 최소화 시키고, RMS 전류를 낮출 수 있는 설계 방법을 제안하고자 한다. 모의시험과 5 kW급 시작품을 이용한 실험결과를 통해 제안하고자 하는 설계 방법의 타당성을 검증하고자 한다.