• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.39.1-39.1
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• 2009

본 실험은 연성과 광 투명도가 뛰어난 아크릴 (PMMA) 과 폴리카보네이트 (Polycabonate) 기판의 축전 결합형 플라즈마 (CCP) 건식 식각 연구에 관한 것이다. 특히 식각 반응기 내부의 압력 변화에 따른 두 기판의 건식 식각 특성 분석에 초점을 맞추었다. 실험에 사용된 기판은 두께 1mm의 아크릴 (PMMA) 과 폴리카보네이트 (Polycabonate)를 $1.5\times1.5\;cm^2$로 절단하여 Photo-lithography 공정을 통하여 감광제 (Photo-resist)로 패턴하였다. 식각 반응기 내부에 패턴 된 아크릴(PMMA) 과 폴리카보네이트 (Polycabonate)를 넣은 후 반응기 내부 진공 상태로 만들었다. 그 후 5 sccm $O_2$ 가스를 유량조절기 (Mass flow controller)를 통하여 식각 반응기 내부로 유입하여 실험을 하였다. 이때 식각 공정 변수는 식각 반응기 내부 압력과 샘플 척 파워이다. 특성평가 항목은 식각 후 기판 (Substrate)의 식각율 (Etch rate), 식각 선택비 (Selectivity) 그리고 기판 표면 거칠기 (RMS roughness)이다. 실험 결과는 표면 단차 분석기(Surface profiler)를 이용하여 기판 (Substrate)의 표면을 분석 하였다. 또한 OES (Optical Emission Spectroscopy) 를 이용하여 식각 중 내부 플라즈마의 상태를 분석하였다. 본 실험 결과에 따르면 5 sccm $O_2$ 가스와 100 W 척 파워를 고정한 후 반응기 내부의 압력을 25 mTorr에서 180 mTorr까지 변화시켜 실험한 결과 40 mTorr의 반응기 내부 압력에서 실험 자료 중 가장 높은 식각율로 아크릴 (PMMA)은 $0.46\;{\mu}m/min$, 폴리카보네이트 (Polycabonate)는 $0.28\;{\mu}m/min$의 결과를 얻었다. 또한 이 자료를 바탕으로 5 sccm $O_2$ 가스와 반응기 내부 압력을 40 mTorr로 고정시키고 RIE 척 파워를 25 W에서 150 W로 증가시켰을 때 아크릴 (PMMA)의 식각율은 $0.15\;{\mu}m/min$에서 $0.72\;{\mu}m/min$까지 증가하였고, 폴리카보네이트 (Polycabonate) 의 식각율은 $0.1\;{\mu}m/min$에서 $0.36\;{\mu}m/min$까지 증가하였다.

• Journal of the Korean Vacuum Society
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• v.21 no.4
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• pp.193-198
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• 2012

In this study, we have fabricated the polymer insulator and diamond-like carbon (DLC) thin films by using plasma enhanced chemical vapor deposition methods. we fabricated the DLC films with various thicknesses as the passivation layer on plasma polymer and investigated the structural, physical, and electrical properties of DLC/plasma polymer films. The plasma polymer synthesized in this work had the low leakage current and low dielectric constant. The values of hardness and elastic modulus in DLC/plasma polymer films are increased, and the value of rms surface roughness is decreased, and contact angle value is increased with increasing DLC film thickness. In the electrical properties of DLC/plasma polymer, the value of the dielectric constant is increased, however the leakage current property of the DLC/plasma polymer is improved than that of plasma polymer film with increasing DLC film thickness.

• Journal of Electrical Engineering and Technology
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• v.5 no.2
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• pp.337-341
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• 2010

In this paper, an extremely low voltage operated micro corner cube retroreflector (CCR) was fabricated for free-space optical communication applications by using bulk silicon micromachining technologies. The CCR was comprised of an orthogonal vertical mirror and a horizontal actuated mirror. For low voltage operation, the horizontal actuated mirror was designed with two PZT cantilever actuators, torsional bars, hinges, and a mirror plate with a size of $400{\mu}m{\times}400{\mu}m$. In particular, the torsional bars and hinges were carefully simulated and designed to secure the flatness of the mirror plate by using a finite element method (FEM) simulator. The measured tilting angle was approximately $2^{\circ}$ at the applied voltage of 5 V. An orthogonal vertical mirror with an extremely smooth surface texture was fabricated using KOH wet etching and a double-SOI (silicon-on-insulator) wafer with a (110) silicon wafer. The fabricated orthogonal vertical mirror was comprised of four pairs of two mutually orthogonal flat mirrors with $400{\mu}m4 (length) $\times400{\mu}m$ (height) $\times30{\mu}m$ (thickness). The cross angles and surface roughness of the orthogonal vertical mirror were orthogonal, almost $90^{\circ}$ and 3.523 nm rms, respectively. The proposed CCR was completed by combining the orthogonal vertical and horizontal actuated mirrors. Data transmission and modulation at a frequency of 10 Hz was successfully demonstrated using the fabricated CCR at a distance of approximately 50 cm.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.1
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• pp.47-49
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• 2003

The cost of material and slicing of silicon wafer occupied more than 30% of solar cell manufacturing cost. The substitution of silicon wafer into STS 304 stainless steel could be the promising solution to decrease the material cost. Moreover the stainless steel solar cell could have the advantage of low weight and durability. However, the highly polished surface is required to meet the characteristic of solar cell. The electropolishing process in phosphoric acid based solution was used to get the surface quality. The obtained result was 28 nm obtained in current density of 2Amfi/$cm^2$ at $80^{\circ}C$. The leveller effect of glycerine, ethylene glycol and propylen glycol was studied. When the 0.4 g/l of ethylene glycol was added to the electrolyte, the surface roughness was best, 15 nm.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.8
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• pp.469-473
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• 2017

We investigated the effect of different thin-film thicknesses (25, 30, and 40 nm) on the electrical performance of solution-processed indium-zinc-oxide (IZO) thin-film transistors (TFTs). The structural properties of the IZO thin films were investigated by atomic force microscopy (AFM). AFM images revealed that the IZO thin films with thicknesses of 25 and 40 nm exhibit an uneven distribution of grains, which deforms the thin film and degrades the performance of the IZO TFT. Further, the IZO thin film with a thickness of 30 nm exhibits a homogeneous and smooth surface with a low RMS roughness of 1.88 nm. The IZO TFTs with the 30-nm-thick IZO film exhibit excellent results, with a field-effect mobility of $3.0({\pm}0.2)cm^2/Vs$, high Ion/Ioff ratio of $1.1{\times}10^7$, threshold voltage of $0.4({\pm}0.1)V$, and subthreshold swing of $0.7({\pm}0.01)V/dec$. The optimization of oxide semiconductor thickness through analysis of the surface morphologies can thus contribute to the development of oxide TFT manufacturing technology.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.6
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• pp.357-361
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• 2018

We demonstrated a crack-free ${\alpha}-Ga_2O_3$ on sapphire substrate by horizontal halide vapor phase epitaxy (HVPE). Oxygen-and gallium chloride-synthesized Ga metal and HCl were used as the precursors, and $N_2$ was used as the carrier gas. The HCl flow and growth temperature were controlled in the ranges of 10~30 sccm and $450{\sim}490^{\circ}C$, respectively. The surface of ${\alpha}-Ga_2O_3$ template grown at $470^{\circ}C$ was flat and the root-mean-square (RMS) roughness was ~2 nm. The full width at half maximum (FWHM) values for the symmetric-plane diffractions, were as small as 50 arcsec and those for the asymmetric-plane diffractions were as high as 1,800 arcsec. The crystal quality of ${\alpha}-Ga_2O_3$ on sapphire can be controlled by varying the HCl flow rate and growth temperature.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.4
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• pp.315-320
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• 2020

Methylammonium lead iodide (MAPbI₃) thin films were grown at low temperatures on glass substrates via 3-zone chemical vapor deposition. Lead iodide (PbI₂) and lead bis (dipivaloylmethanate) [Pb(dpm)₂] precursors were used as lead sources. Due to the high sublimation temperature (~400℃) of the PbI₂ precursor, a low substrate temperature could not be constantly maintained. Therefore, MAPbI₃ thin films degraded into the PbI₂ phase. In contrast, for the Pb(dpm)₂ precursor, a substrate temperature of ~120℃ was maintained because the sublimation temperature of Pb(dpm)₂ is as low as 130℃ at a high vapor pressure. As a result, high-quality MAPbI₃ thin films were successfully grown on glass substrates using Pb(dpm)₂. The rms (root-mean-square) roughness of MAPbI₃ thin films formed from Pb(dpm)₂ was as low as ~19.2 nm, while it was ~22.7 nm for those formed using PbI₂. The grain size of the films formed from Pb(dpm)₂ was as large as approximately 350 nm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.282-283
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• 2005

Ion beam assisted deposition(IBAD) technique was used to produce biaxially textured polycrystalline MgO thin films for high critical current YBCO coated conductor. Hastelloy tapes were continuous electropolished with very smooth surface for IBAD-MgO deposition, RMS roughness of Hastelloy tape values below 2 nm and local slope of less than $1^{\circ}$. After the polishing of the tape an amorphous $Y_2O_3$ and $Al_2O_3$ are deposited Biaxially textured MgO was deposited on amorphous layer bye-beam evaporation with a simultaneous bombardment of high energy ions. We had developed the RHEED to measure in-situ biaxial texture of film surface as thin as tens angstrom. And also ex-situ characterization of buffer layers was studied using XRD and SEM. The full-width at half maximum(FWHM) out of plane texture of IBAD-MgO template is $4^{\circ}$.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.72-72
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• 2010

탄소나노튜브(carbon nanotubes : CNTs)는 뛰어난 전기적, 물리적인 특성을 가지고 있기 때문에 다양한 분야에서 이를 활용하려는 노력들이 활발히 이루어지고 있다. CNTs의 전기적인 특성은 직경에 의해 결정되므로, 직경을 균일하게 제어하는 일이 CNTs를 기반으로 한 전자소자 응용에 가장 중요한 사항이라 할 수 있다. 일반적으로 화학기상증착법(chemical vapor deposition, CVD)으로 합성된 CNTs의 직경은 촉매의 크기에 의존하기 때문에, 촉매의 크기를 제어하기 위한 다양한 연구들이 활발히 진행되고 있다[1-3]. 하지만 CNTs의 성장온도 근처에서 촉매 입자는 표면 확산(surface diffusion)에 의해 응집(agglomeration)되기 때문에 작고 균일한 크기의 촉매를 얻기 어렵다. 본 연구에서는 Si(001) 기판 위에 지지층(supporting layer)인 Al의 두께를 변화시켜 증착하고, 열적산화과정을 통해 $Al_2O_3$ 층을 형성한 후 Fe을 증착하여 CNTs를 합성하였다. $Al_2O_3$ 지지층과 Fe 촉매입자의 구조와 화학적 상태를 원자힘현미경 (atomic force microscopy, AFM), 주사전자현미경 (scanning electron microscopy, SEM), 투과전자현미경 (transmission electron microscopy, TEM), X-선 광전자 분광기(X-ray photoelectron spectroscopy)를 통해 분석하였고, 성장된 CNTs는 SEM, TEM, 라만 분광법 (Raman spectroscopy)을 통해 분석하였다. 그 결과, $Al_2O_3$ 층은 두께에 따라 각기 다른 표면 거칠기(RMS roughness)와 결정립(grain)의 크기를 갖게 되며, 이러한 표면구조가 Fe 촉매입자의 표면확산에 의한 응집에 관여하여 CNTs의 직경에 영향을 미치는 것을 확인하였다. 또한 $Al_2O_3$ 지지층의 두께가 15 nm인 경우, Fe의 응집현상이 억제되어 좁은 직경분포를 지닌 고순도 단일벽 탄소나노튜브(Single-walled CNTs)가 성장되는 것을 확인하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.182.1-182.1
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• 2013

Silver (Ag)는 높은 반사율을 가지고 있어 Top-Emission Organic Light Emitting Diode (T-OLED)의 반사전극으로 사용하기 적합하지만 일함수가 낮은 단점 (4.3 eV)을 가지고 있다. 이런 낮은 일함수를 증가시키기 위하여 Ag 박막 표면을 산화시켜 일함수를 증가시키기 위한 연구가 진행중에 있으며, 이 연구에서는 UV로 $O_3$을 발생시켜 Ag 박막 표면을 산화시키기 위한 연구를 진행하였다. 특히, Ag 박막 표면의 일함수 변화를 측정하기 위하여 SPM (Scanning Probe Microscopy)의 KPFM (Kelvin Probe Force Microscopy) mode를 적용하여 nano 영역에서의 일함수 변화를 surface potential로 측정하여 UV 표면 산화에 의한 표면 일함수 형상을 확인하였다. Ag 박막은 rf magnetron sputter를 사용하여, Si 기판위에 300nm 두께로 증착시켰다. 이후 $O_3$ 발생되는 UV 램프로 Ag 박막 표면 30초 간격으로 최대 5분간 산화시켰으며, 이후 KPFM mode를 사용하여 산화 시간에 따른 Ag 박막 표면의 potential 변화를 측정하였다. 0~3분간 산화된 Ag 박막 표면의 potential은 약 6 mV로 일정하였으나 3분 이후 최대 110 mV까지 급격하게 변화하는 것을 확인할 수 있었다. Ag 박막 표면의 RMS roughness는 UV 산화처리 전0.7 nm였으나, potential이 급격하게 증가하는 시점인 3분 이후 2.83 nm로 약 400% 이상 증가하였다. 이를 통해 $O_3$ 발생 UV 램프로 산화된 Ag 박막의 표면 물성은 처리 시간에 따라 급격히 변하는 것을 확인하였다.