• 한국지반공학회논문집
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• 제21권8호
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• pp.13-26
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• 2005

모래의 aging현상은 점성토에 비하여 무시할 정도로 매우 작아서 1980년대 초까지는 거의 연구되지 않았다. 그러나 퇴적이나 교란 후 시간경과에 따라 관입저항치의 증가가 관찰되면서 현장시험을 중심으로 모래의 aging 효과에 대하여 활발한 조사가 이루어졌고, 최근에는 현장시험뿐만 아니라 실내시험에서도 여러 연구자들에 의해 모래의 aging 효과가 규명되어지고 있다. 본 연구에서는 모래의 비배수 반복전단거동에 대한 aging효과를 살펴보기 위해 낙동강 모래를 이용하여 상대밀도$(D_r)$, 압밀응력비$(K_c)$ 그리고 압밀시간을 달리하여 비배수 반복삼축압축시험을 실시하였다. 시험결과, 비배수 반복전단강도$(R_f)$는 압밀시간에 따라 증가한다는 사실을 확인할 수 있었다. 본 시험결과에서 나타난 aging 에 따른 $R_f$ 증가율을 이용하여 낙동강 모래지반의 지진규모별 비배수 반복전단강도의 현장적용 범위를 제안하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.181-181
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• 2008

DLC (Diamond-like Carbon) 박막은 높은 내마모성과 낮은 마찰 계수, 화학적 안정성 및 적외선 영역에서의 높은 투과율과 낮은 광 반사도, 높은 전기저항과 낮은 유전율, 전계방출특성 등 여러 가지 장점을 가진 물질이다[1]. 최근에는 DLC 박막의 여러 장점들과 산과 염기 유기용매에 대한 화학적 안정성으로 인하여 인조관절에서 인공심장의 판막에 이르기까지 의공학 관련 부품소재로 응용되고 있으며 내구성과 안정성에 있어서 탁월한 성능을 보여주고 있다. 또한 DLC 박막의 높은 경도와 낮은 마찰 계수, 부드러운 박막 표면 (수nm의 RMS 거칠기)의 장점을 살려 마그네틱 미디어와 하드디스크의 슬라이딩 표면에 사용되어지고, MEMS (Micro-Electro Mechanical System) 소자와 MMAs (Moving Mechanical Assemblies)의 고체윤활코팅으로 활용하여 미세기계의 내구성과 성능 향상을 도모할 수 있다. 이와 같이 DLC 박막은 다양한 분야에 응용되고 있으며, 박막이 지닌 여러 가지 장점들로 인하여 더 많은 분야에 응용될 가능성을 지닌 물질이다. 그러나 수 ${\mu}m$이상의 두께에서 박막이 높은 잔류응력 (residual stress)을 가지고, 열에 취약하여 이의 개선에 관한 연구들이 진행되어 지고 있다 [2]. 따라서 사용되는 목적에 따라 용도에 맞는 양질의 DLC 박막을 합성하기 위해선 합성 장치의 개발과 다양한 실험을 통한 최적의 합성조건 도출 등의 노력이 요구된다. 또한 DLC 박막 합성시의 여러 가지 증착 방법에 따른 박막 물성에 대한 재현성 확보 및 박막 증착에 관한 명확한 메커니즘 규명이 아직까지는 불분명하여 이에 관한 연구가 시급하다. 따라서 본 연구에서는 MEMS 소자와 MMAs의 고체윤활코팅으로 사용가능한 DLC 박막을 RF PECVD (Plasma Enhanced Vapor Deposition) 방식으로 합성하고 후열처리 온도에 따른 DLC 박막의 마찰계수 변화를 박막에 훼손을 주지 않는 FFM (Friction Force Microscopy) 방식을 사용하여 분석하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.168-168
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• 2008

Dimension of a transistor has rapidly shrunk to increase the speed of device and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate dioxide layer and low conductivity characteristic of poly-Si gate in nano-region. To cover these faults, study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$, and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-Si gate is not compatible with high-k materials for gate-insulator. Poly Si gate with high-k material has some problems such as gate depletion and dopant penetration problems. Therefore, new gate structure or materials that are compatible with high-k materials are also needed. TiN for metal/high-k gate stack is conductive enough to allow a good electrical connection and compatible with high-k materials. According to this trend, the study on dry etching of TiN for metal/high-k gate stack is needed. In this study, the investigations of the TiN etching characteristics were carried out using the inductively coupled $BCl_3$-based plasma system and adding $Cl_2$ gas. Dry etching of the TiN was studied by varying the etching parameters including $BCl_3$/Ar gas mixing ratio, RF power, DC-bias voltage to substrate, and $Cl_2$ gas addition. The plasmas were characterized by optical emission spectroscopy analysis. Scanning electron microscopy was used to investigate the etching profile.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.411-412
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• 2008

We have studied a property change of organic light-emitting diodes (OLED) due to an indium tin oxide (ITO) surface reformation. The characteristics of OLED were improved by oxygen plasma processing of an ITO in this work. ITO is widely used as a transparent electrode in light-emitting devices, and the OLED device performance is sensitive to the surface properties of the ITO. The OLED devices with the structure of ITO/TPD(50nm)/$Alq_3$(70nm)/LiF(0.5nm)/Al(100nm) were fabricated, and the surface properties of ITO were investigated by using various characterization techniques. The oxygen plasma process of an ITO was processed by using RF power of 125W and oxygen partial pressure of $2\times10^{-2}$ Torr. The oxygen plasma processing of an ITO processed for 0/1/2/3/4min. Current-voltage-luminance characteristics of the devices show that turn-on voltage is 4V for 2min device and the luminance reaches about 27,000cd/$m^2$ for 4min device. The current efficiency shows that 3min device becomes saturated to be about 8cd/ A. They show that emission was from the $Alq_3$ layer, because the peak wavelength is about 525nm. View angle-dependent emission spectra show that the emission intensity decreases as the angle increases.

• 한국전기전자재료학회논문지
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• 제26권11호
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• pp.826-830
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• 2013

In this paper, we carried out the investigations of both etch characteristics and mechanisms for the $SnO_2$ thin films in $O_2/BCl_3/Ar$ plasma. The dry etching characteristics of the $SnO_2$ thin films was studied by varying the $O_2/BCl_3/Ar$ gas mixing ratio. We determined the optimized process conditions that were as follows: a RF power of 700 W, a DC-bias voltage of - 150 V, and a process pressure of 2 Pa. The maximum etch rate was 509.9 nm/min in $O_2/BCl_3/Ar$=(3:4:16 sccm) plasma. From XPS analysis, the etch mechanism of the $SnO_2$ thin films in the $O_2/BCl_3/Ar$ plasma can be identified as the ion-assisted chemical reaction while the role of ion bombardment includes the destruction of the metal-oxide bonds as well as the cleaning of the etched surface form the reaction products.

• 한국전기전자재료학회논문지
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• 제16권9호
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• pp.807-811
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• 2003

We investigated the electrical characterisitics of T $a_2$ $O_{5}$ (tantalum pentoxide) film and Ti-O/T $a_2$ $O_{5}$ film deposited on $Al_2$ $O_3$based substrate. Ta (tantalum) electrode and $Al_2$ $O_3$ substrate was used for the purpose of simplifying the manufacturing process in IPD's (integrated passive devices). Dielectric materials (T $a_2$ $O_{5}$ and Ti-O/T $a_2$ $O_{5}$ films) deposited on Ta/Ti/A $l_2$ $O_3$ were annealed at 700 $^{\circ}C$ for 60 sec. in vacuum. The XRD results showed that as-deposited T $a_2$ $O_{5}$ film possessed amorphous structure, which was transformed to crystallines by rapid thermal heat treatment. We compared the lnJ- $E^{{\frac}{1}{2}}$, C-V, C-F of both as-deposited and annealed dielectric thin films deposited on Ta bottom electrode. From this results, we concluded that the leakage current could be reduced by introducing Ti-O buffer layer and conduction mechanisms of T $a_2$ $O_{5}$ and Ti-O/T $a_2$ $O_{5}$ could be interpreted appropriately by Schottky emission effect.

• 한국전기전자재료학회논문지
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• 제13권10호
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• pp.859-864
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• 2000

Recently IR detecting devices using MEMS have been actively studied. Microbolometer, one of these devices, detects the change of resistivity as the change of temperature of the device by absorbing IR, IR absorbing materials for microbolometer should have high TCR value and low noise characteristics which depends on resistivity. We fabricated multi-layer VOx thin films to improve the IR detectivity of uncooled IR devices and analyzed IR absorbing characteristics. We fabricated multi-layer VOx thin films by RF reactive sputtering method on SiNx substrate and changed characteristics using the different thickness of V and V$_2$O$\_$5/ thin films. Then we annealed them under 300$\^{C}$. The TCR (Temperature Coefficient of Resistance) measurement was carried out to estimate the IR detectivity of multi-layer VOx thin films. XRD (X-Ray Diffraction) analysis was carried out to estimate the IR detectivity of multi-layer VOx thin films. ZXRD (X-Ray Diffraction) analysis was used to find out phases and structures of V and V$_2$O$\_$5/ thin films. AES (Auger Electron Spectroscopy) analysis was used to find out composition of multi-layer VOx thin films before and after annealing. We obtained the optimum thickness range of V and V$_2$O$\_$5/ thin films from the result of AES analysis. We changed the thickness of V$_2$O$\_$5/ about 20 to 150 $\AA$ and thickness of V about 10 to 20 $\AA$. As the result of this, TCR value of multi-layer VOx thin films was about -2%/k and the resistivity was ∼1Ωcm.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.469-472
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• 1999

CeO$_2$ thin films have used in wide applications such as SOI, buffer layer, antirflection coating, and gate dielectric layer. CeO$_2$takes one of the cubic system of fluorite structure and shows similar lattice constant (a=0.541nm) to silicon (a=0.543nm). We investigated CeO$_2$films as buffer layer material for nonvolatile memory device application of a single transistor. Aiming at the single transistor FRAM device with a gate region configuration of PZT/CeO$_2$ /P-Si , this paper focused on CeO$_2$-Si interface properties. CeO$_2$ films were grown on P-type Si(100) substrates by 13.56MHz RF magnetron sputtering system using a 2 inch Ce metal target. To characterize the CeO$_2$ films, we employed an XRD, AFM, C-V, and I-V for structural, surface morphological, and electrical property investigations, respectively. This paper demonstrates the best lattice mismatch as low as 0.2 % and average surface roughness down to 6.8 $\AA$. MIS structure of CeO$_2$ shows that breakdown electric field of 1.2 MV/cm, dielectric constant around 13.6 at growth temperature of 200 $^{\circ}C$, and interface state densities as low as 1.84$\times$10$^{11}$ cm $^{-1}$ eV$^{-1}$ . We probes the material properties of CeO$_2$ films for a buffer layer of FRAM applications.

• 한국전기전자재료학회논문지
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• 제16권3호
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• pp.195-201
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• 2003

The (Ba,Bi,Sr)TiO$_3$[BBST] thin films were fabricated on Pt/Ti/SiO$_2$ /Si substrate by RF sputtering method. The effects of Ar/O$_2$ ratio on the structural and dielectric properties of BBST thin films were investigated. Increasing the Ar/O$_2$ ratio, the intensity of BaBi$_4$Ti$_4$O$_{15}$ and Bi$_4$Ti$_3$O$_{12}$ peaks were increased but (Ba$_{0.5}$Sr$_{0.5}$)TiO$_3$ peak was decreased. In the BBST thin films deposited with condition of Ar/O$_2$(90/10) ratio, the composition ratio of the Ba, Bi and Sr atoms were 0.35, 0.25 and 0.4 respectively. The Bi and Ti atoms were diffused into the Pt layers. Increasing the Ar/O$_2$ ratio, the dielectric constant of the BBST thin films were increased but the dielectric loss of the BBST thin films were decreased. The dielectric constant and dielectric loss of the BBST deposited at 90/10 of Ar/O$_2$ ratio were 319 and 2.2%. respectively . Increasing the applied voltage, the capacitance of the BBST thin films were decreased.reased.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.53-54
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• 2006

Arsenic doped p-type ZnO thin films have been realized on intrinsic (100) GaAs substrate by RF magnetron sputtering and thermal annealing treatment. p-Type ZnO exhibits the hole concentration of $9.684{\times}10^{19}cm^3$, resistivity of $2.54{\times}10^{-3}{\Omega}cm$, and mobility of $25.37\;cm^2/Vs$. Photoluminescence (PL) spectra of As doped p-type ZnO thin films reveal neutral acceptor bound exciton ($A^{0}X$) of 3.3437 eV and a transition between free electrons and acceptor levels (FA) of 3.2924 eV. Calculated acceptor binding energy ($E_A$) is about 0.1455 eV. Thermal activation and doping mechanism of this film have been suggested by using X-ray photoelectron spectroscopy (XPS). p-Type formation mechanism of As doped ZnO thin film is more related to the complex model, namely, $As_{Zn}-2V_{Zn}$, in which the As substitutes on the Zn site, rather than simple model, Aso, in which the As substitutes on the O site. ZnO-based p-n junction was fabricated by the deposition of an undoped n-type ZnO layer on an As doped p-type ZnO layer.