• 한국막학회:학술대회논문집
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• 한국막학회 1995년도 제3회 심포지움 (분리막 연구의 최신동향)
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• pp.57-71
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• 1995

A simple mathematical model for gacilitated mass transport with a fixed site carrier membrane was derived by assuming an instantaneous, microscopic concentration (activity) fluctuation, The concentration fluctuation, developed due to reversible chemical reaction between carrier and solute, could acuse the higher chemical potential gradient and the facilitated transport. For mathematical formulation, an analogy was employed between the mass transfer for the facilitated transport with fixed site carrier membrane and the electron transfer in a parallel resistor-capacitor (RC) circuit. For the single RC model, it was assumed that a single capacitor represented the total carrier and a solute could not inter-diffuse between matrix and carrier, allowing only two diffusional pathways, This assumption was relaxed by adopting a serial combination of the parallel RC circuit. Here, a solute diffuses in two elements (matrix or carrier) can exchange its pathway, exhibiting four diffusional pathways. The current models were examined against experimental data and the agreement was exceptional.

• 전자공학회논문지A
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• 제31A권9호
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• pp.146-155
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• 1994

In this paper, we desribe a new system, called BEST, that is used to develop a macromodel or behavioral model easily. It automatically calculates the component values of macromodel represented by equations to satisfy the given specification. Also, it gives the way to analyze both the behavioral model and transistor level circuit, and then compare the analysis results of them to check the correspondence under specific temperature and bias condition, and BEST optimizes the component values of macromodel. Other feature is to characterize MOSFET as switch model which consists of PWL-RC network. Finally, it is possible to generage multi-level netlist which consists of macro/switch/transistor level circuits, and user can determine the trade-off between simulation speed and accuracy. With the graphic user interface form of macromodel development system described above. BEST enable designers to make macromodel by themselves and to uas it. We applied BEST to develop the macromodel for the test circuit and got the 18.6 times simulation speed up with preserving the accuracy within 10% compared to the conventional transistor level circuit simulation. Also, applicability of optimization capability was verified.

• 전자공학회논문지
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• 제51권1호
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• pp.172-178
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• 2014

본 논문은 공통 소스 증폭기의 부유 커패시턴스에 밀러 정리를 적용할 때 출력 커패시턴스를 고려한 AC 이득을 사용하여 정확한 밀러 효과 모델을 도출하였다. 정확한 AC 이득을 사용하면 부유 커패시턴스는 입력과 출력 부분에 C와 병렬 RC 회로의 직렬연결로 변환된다. 제안한 밀러 효과 모델로 구성된 등가회로의 주파수 응답 특성은 변환 전 회로의 주파수 응답 특성과 일치해 제안한 모델의 정확성이 확인되었다. 제안한 밀러 효과 모델과 소자 값이 다소 복잡하지만 공통 소스 증폭기의 특성을 이용하여 간략화 시킬 수 있다. 또한 개방 회로 시정수 방법을 사용하면 증폭기의 3-dB 주파수도 쉽게 예측이 가능하며 예측된 3-dB 주파수는 공통 소스 증폭기의 주 극점 근사 방법과 같은 값을 가진다.

• 전력전자학회논문지
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• 제24권5호
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• pp.365-371
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• 2019

This study shows the feasibility of the parameter of the 1st RC parallel equivalent circuit as a factor of the heat generation of lithium-ion cell. The internal resistance of a lithium-ion cell consists of ohmic and polarization resistances. The internal resistances at various SOCs of the lithium-ion cell are obtained via an electrical characteristic test. The internal resistance is inversely obtained through the amount of heat generated during the experiment. By comparing the resistances obtained using the two methods, the summation of ohmic and polarization resistances is identified as the heating factor of lithium-ion battery. Finally, the amounts of heat generated from the 2C, 3C, and 4C-rate discharge experiments and the COMSOL multiphysics simulation using the summation of ohmic and polarization resistances as the heating parameter are compared. The comparison shows the feasibility of the electrical parameters of the 1st RC parallel equivalent circuit as the heating factor.

• 대한전자공학회논문지SD
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• 제41권12호
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• pp.27-34
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• 2004

최근 실리콘 미세공정의 발달로 상용화된 0.2$\mum$ 게이트길이 이하의 deep submicron MOSFET 출력특성을 정확히 모델링하기 위해서는 RF 기판 회로 연구가 필수적이다. 먼저 본 논문에서는 기판 캐패시던스와 기판 저항이 병렬로 연결된 모델과 기판 저항만을 사용한 단순 모델들에 적합한 직접 추출 방법을 각각 개발하였다. 이 추출방법들을 0.15$\mum$ CMOS 소자에 적용한 결과 단순 모델보다 RC 병렬 기판모델이 측정된 $Y_{22}$-parameter에 30GHz까지 더 잘 일치하는 것을 확인하였으며, 이는 RC 병렬 기판모델 및 직접추출방법의 RF 정확도를 증명한다. 이러한 RC 병렬 기판모델을 사용하여 게이트 길이를 0.11에서 0.5$\mum$까지 변화시키고 드레인 전압을 0에서 1.2V까지 증가시키면서 기판 모델 파라미터들의 bias 종속 특성과 게이트 길이 종속 특성을 새롭게 추출하였다. 이러한 새로운 추출 결과는 scalable한 RF 비선형 기판 모델 개발에 유용하게 사용될 것이다.

• Journal of Power Electronics
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• 제16권2호
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• pp.643-653
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• 2016

The conventional methods used to evaluate battery state-of-charge (SOC) cannot accommodate the chemistry nonlinearities, measurement inaccuracies and parameter perturbations involved in estimation systems. In this paper, an impedance-based equivalent circuit model has been constructed with respect to a LiFePO₄ battery by approximating the electrochemical impedance spectrum (EIS) with RC circuits. The efficiencies of approximating the EIS with RC networks in different series-parallel forms are first discussed. Additionally, the typical hysteresis characteristic is modeled through an empirical approach. Subsequently, a methodology incorporating an H-infinity observer designated for open-circuit voltage (OCV) observation and a hysteresis model developed for OCV-SOC mapping is proposed. Thereafter, evaluation experiments under FUDS and UDDS test cycles are undertaken with varying temperatures and different current-sense bias. Experimental comparisons, in comparison with the EKF based method, indicate that the proposed SOC estimator is more effective and robust. Moreover, test results on a group of Li-ion batteries, from different manufacturers and of different chemistries, show that the proposed method has high generalization capability for all the three types of Li-ion batteries.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.393-396
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• 1999

A circuit model of silicon substrate coupling for CMOS RF-IC design is developed. Its characteristics are analyzed by using a simple RC mesh model in order to investigate substrate coupling. The coupling effects due to the substrate were characterized with substrate resistivity, oxide thickness, substrate thickness. and physical distance. Thereby the silicon substrate effects are analytically investigated and verified with simulation. The analysis and simulation of the model have excellent agreements with MEDICI(2D device simulator) simulation results.

• 설비공학논문집
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• 제28권10호
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• pp.381-386
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• 2016

An optimization algorithm is developed based on a simulation case of a single family house model equipped with PV arrays. To increase the nationwide use of PV power generation facilities, a market-competitive electricity price needs to be introduced, which is determined based on the time of use. In this study, quadratic programming optimization was applied to minimize the electricity bill while maintaining the indoor temperature within allowable error bounds. For optimization, it is assumed that the weather and electricity demand are predicted. An EnergyPlus-based house model was approximated by using an equivalent RC circuit model for application as a linear constraint to the optimization. Based on the RC model, model predictive control was applied to the management of the cooling load and electricity for the first week of August. The result shows that more than 25% of electricity consumed for cooling can be saved by allowing excursions of temperature error within an affordable range. In addition, profit can be made by reselling electricity to the main grid energy supplier during peak hours.

• 한국철도학회논문집
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• 제19권3호
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• pp.314-323
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• 2016

직류 전철변전소의 가선전압은 전동차들의 회생제동 및 역행가속패턴에 따라 급격히 상승 또는 하강하는 특성을 갖는다. 가선전압 순시 변동폭을 최소로 유지함으로써, 전철변전소와 전동차들의 에너지 효율을 개선시키기 위한 다양한 연구들이 이루어지고 있다. 본 논문은 직류전철 변전소의 가선전압의 급격한 변동특성을 모델링하고 선형인공 신경망 알고리즘을 이용한 가선전압 회로모델의 파라메터 추정 방법을 제안하며, 최소자승법을 이용한 추정방법과의 비교를 통해 이 방법의 타당성을 입증한다. 가선전압 및 피더전류들의 누적 측정값을 사용하여 일괄처리 최소자승법으로 RC 병렬회로의 파라메터들을 추정한 결과를 제시하며, 실시간 가선전압 및 피더전류 측정값을 이용하여 오차역 전파방식으로 학습되는 선형인공신경망 기법 추정 결과를 분석한다.

• 전자공학회논문지
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• 제49권9호
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• pp.259-269
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• 2012

전원 전압이 낮아지고, 칩의 동작 속도가 빨라짐에 따라 온-칩 인덕턴스를 포함한 power distribution network (PDN) 분석이 중요해 질 것으로 예측된다. 본 논문에서는 일반적인 온-칩 전력 격자 구조에 적용시킬 수 있는 효과적인 인덕턴스 추출방법에 대해 제안한다. Chip layout에 적용할 수 있는 loop 인덕턴스 모델을 제시하고, 그 모델을 사용하여 post layout RC extraction netlist로 부터 인덕턴스를 포함한 netlist를 추출할 수 있는 tool을 개발하였다. 제안된 loop 인덕턴스 모델과 개발된 tool의 정확성은 회로 simulation을 통해 PEEC 모델과 비교하여 검증하였다. 인덕턴스 추출 방법을 실제 chip layout에 적용시켜 on-chip inductance를 포함한 PDN의 voltage fluctuation을 예측하였다. 패키지와 PCB 모델을 포함한 co-simulation 모델을 구성하여 on-chip inductance의 영향을 분석하였다.