• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.538-540
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• 2004

Electrical currents generated by human heart activities create magnetic fields represented by MCG(MagnetoCardioGram). Since an MCG signal acquisition system requires precise and stable operation, the system adopts hundreds of SQUID(Superconducting QUantum Interface Device) sensors for signal acquisition. Such a system requires fast real-time data acquisition in a required sampling interval, i.e., 1 mili-second for each sensor. This paper presents designed hardware to acquire data from 256-channel analog signal with 1 ksamples/sec speed, using 12-bit 8-channel ADC devices, SPI interfaces, parallel interfaces, 8-bit microprocessors, and a DSP processor. We implemented SPI interface between ADCs and a microprocessor, parallel interfaces between microprocessors. Our result concludes that the data collection can be done in $168{\mu}sec$ time-interval for 256 SQUID sensors, which can be interpreted to 6 ksamples/sec speed.

• Progress in Superconductivity
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• v.9 no.2
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• pp.157-161
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• 2008

Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.444-447
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• 2004

A heart diagnosis system adopts hundreds of Superconducting Quantum Interface Device(SQUID) sensors for precision MCG(Magnetocardiogram) or MEG(Magnetoencephalogram) signal acquisitions. This system requires correct and real-time data acquisition from the sensors in a required sampling interval, i.e., 1 mili-second. This paper presents our hardware design and test results, to acquire data from 256 channel analog signal with 1-ksample/sec speed, using 12-bit 8-channel ADC devices, SPI interfaces, parallel interfaces, and 8-bit microprocessors. We chose to implement parallel data transfer between microprocessors as an effective way of achieving such data collection. Our result concludes that the data collection can be done in 250 ${\mu}sec$ time-interval.

• 한국초전도학회:학술대회논문집
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• v.14
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• pp.55-55
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• 2004

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.5
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• pp.1089-1098
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• 2018

As the development of quantum computers becomes visible, the researches on post-quantum cryptography to alternate the present cryptography system have actively pursued. To substitute RSA and Elliptic Curve Cryptosystem, post-quantum cryptography must also consider side channel resistance in implementation. In this paper, we propose a side channel analysis on NTRU, based on the implementation made public in the NIST standardization. Unlike the previous analysis which exploits a thousands of traces, the proposed attack can recover the private key using a single power consumption trace. Our attack not only reduces the complexity of the attack but also gives more possibility to analyze a practical public key cryptosystem. Furthermore, we suggested the countermeasure against our attacks. Our countermeasure is much more efficient than existing implementation.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.6
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• pp.35-43
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• 1999

We propose and analyze novel optical thyristor which can be used in free-space optical interconnection(FSOI). Novel optical thyristors are fully depleted optical thyristors(DOTs) using bottom mirror and/or multiple quantum wells (MQW), thereby its switching characteristics can be improved significantly. We obtain switching characteristics using coupled junction model associated with current oriented method. Emission characteristics of the DOT are obtained using thin film characteristic matrix and van Roosbroeck-Shockley relation. Compared to the performance using conventional DOT, the optical switching energy is decreased by a factor of 0.43 and the bit-rate is increased by a factor of 1.61 when the DOT with MQW and bottom mirror is employed for FSOI.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.34 no.1
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• pp.1-9
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• 2024

Multivariate Quadratic (MQ)-based digital signature schemes have advantages such as ease of implementation and small signature sizes, making them promising candidates for post-quantum cryptography. To enhance the efficiency of such MQ-based digital signature schemes, utilizing sparse matrices have been proposed, including HiMQ, which has been standardized by Korean Telecommunications Technology Association standard. However, HiMQ shares a similar key structure with Rainbow, which is a representative MQ-based digital signature scheme and was broken by the MinRank attack proposed in 2022. While HiMQ was standardized by a TTA and recommended parameters were provided, these parameters were based on cryptanalysis as of 2020, without considering recent attacks. In this paper, we examine attacks applicable to MQ-based digital signatures, specifically targeting HiMQ, and perform a security analysis. The most effective attack against HiMQ is the combined attack, an improved version of the MinRank attack proposed in 2022, and none of the three recommended parameters satisfy the desired security strength. Furthermore, HiMQ-128 and HiMQ-160 do not meet the minimum security strength requirement of 128-bit security level.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.107-116
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• 2009

Quantum-dot Cellular Automata (QCA) is one of the most promising next generation nanoelectronic devices which will inherit the throne of CMOS which is the domineering implementation technology for large scale low power digital systems. In late 1990s, the basic operations of the QCA cell were already demonstrated on a hardware implementation. Also, design tools and simulators were developed. Nevertheless, its design technology is not quite ready for ultra large scale designs. This paper proposes a new approach which enables the QCA designs to inherit the verification methodologies and tools of CMOS designs, as well. First, a set of disciplinary rules strictly restrict the cell arrangement not to deviate from the predefined structures but to guarantee the deterministic digital behaviors is proposed. After the gate and interconnect structures of. the QCA design are identified, the signal integrity requirements including the input path balancing of majority gates, and the prevention of the noise amplification are checked. And then the digital logic is extracted and stored in the OpenAccess common engineering database which provides a connection to a large pool of CMOS design verification tools. Towards validating the proposed approach, we designed a 2-bit adder, a bit-serial adder, and an ALU bit-slice. For each design, the digital logic is extracted, translated into the Verilog net list, and then simulated using a commercial software.

• Proceedings of the Korea Information Processing Society Conference
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• 2023.05a
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• pp.227-229
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• 2023

양자컴퓨터는 큐비트(qubit)의 얽힘(entanglement)과 중첩(superposition) 성질을 통해 동시에 연산을 수행할 수 있어 고전컴퓨터에 비해 연산 속도가 획기적으로 빠르다. 전수조사 연산을 매우 빠르게 수행할 수 있는 양자 알고리즘인 Grover 알고리즘을 사용하면, n-bit 보안강도를 가지는 SHA2와 같은 해시함수를 n/2-bit 보안강도로 낮추게 되어 해시함수가 적용되는 분야의 보안을 위협하게 된다. 양자컴퓨터를 통한 해킹에는 많은 양자 자원이 요구되고, 안정적인 구동 환경이 갖춰져야 하기 때문에 실현되기 위해서는 아직까지 상당한 시간이 소요될 것으로 보인다. 이에 연구자들은 필요한 양자 자원을 최소화하는 효율적인 양자 공격 회로를 제시하며 연구를 수행하고 있다. 본 논문에서는 이러한 SHA2 해시함수에 대한 양자 회로 구현 동향에 대해 살펴본다.

• ETRI Journal
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• v.43 no.5
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• pp.916-922
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• 2021

We calculated the correlation between the doping concentration of the charge layer and the multiplication layer for separate absorption, grading, charge, and multiplication InGaAs/InAlAs avalanche photodiodes (APDs). For this purpose, a predictable program was developed according to the concentration and thickness of the charge layer and the multiplication layer. We also optimized the design, fabrication, and characteristics of an APD for 20 Gbps application. The punch-through voltage and breakdown voltage of the fabricated device were 10 V and 33 V, respectively, and it was confirmed that these almost matched the designed values. The 3-dB bandwidth of the APD was 10.4 GHz, and the bit rate was approximately 20.8 Gbps.