• Title/Summary/Keyword: Pulse bias

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Modified Ramp Reset Waveform for High Contrast Ratio in AC PDPs

  • Kim, Jae-Sung;Yang, Jin-Ho;Ha, Chang-Hoon;Whang, Ki-Woong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.199-202
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    • 2002
  • In general, the background light produced during the reset period deteriorates the dark room contrast ratio in AC PDP. In this paper, we propose a modified ramp reset pulse that can reduce the background light to imperceptible level. In the new reset waveform, the discharges between the scan and sustain electrodes are minimized by applying a positive bias voltage to the sustain electrode and only the weak discharges between the scan and address electrodes occur during the reset period. We adopted a MgO coated phosphor layer to get the same level of voltage margin in the new reset pulse scheme compared to that of the conventional ramp reset pulse one. As a result, the voltage margin is maintained at the same level and the dark room contrast ratio is improved dramatically.

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Issues in Building Large RSFQ Circuits (대형 RSFQ 회로의 구성)

  • Kang, J.H.
    • Progress in Superconductivity
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    • v.3 no.1
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    • pp.17-22
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    • 2001
  • Practical implementation of the SFQ technology in most application requires more than single-chip-level circuit complexity. Multiple chips have to be integrated with a technology that is reliable at cryogenic temperatures and supports an inter-chip data transmission speed of tens of GHz. In this work, we have studied two basic issues in building large RSFQ circuits. The first is the reliable inter-chip SFQ pulse transfer technique using Multi-Chip-Module (MCM) technology. By noting that the energy contained in an SFQ pulse is less than an attojoule, it is not very surprising that the direct transmission of a single SFQ pulse through MCM solder bump connectors can be difficult and an innovative technique is needed. The second is the recycling of the bias currents. Since RSFQ circuits are dc current biased the large RSFQ circuits need serial biasing to reduce the total amount of current input to the circuit.

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Design and Measurement of an SFQ OR gate composed of a D Flip-Flop and a Confluence Buffer (D Flip-Flop과 Confluence Buffer로 구성된 단자속 양자 OR gate의 설계와 측정)

  • 정구락;박종혁;임해용;장영록;강준희;한택상
    • Progress in Superconductivity
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    • v.4 no.2
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    • pp.127-131
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    • 2003
  • We have designed and measured an SFQ(Single Flux Quantum) OR gate for a superconducting ALU (Arithmetic Logic Unit). To optimize the circuit, we used WRspice, XIC and Lmeter for simulations and layouts. The OR gate was consisted of a Confluence Buffer and a D Flip-Flop. When a pulse enters into the OR gate, the pulse does not propagate to the other input port because of the Confluence Buffer. A role of D Flip-Flip is expelling the data when the clock is entered into D Flip-Flop. For the measurement of the OR gate operation, we attached three DC/SFQs, three SFQ/DCs and one RS Flip -Flop to the OR gate. DC/SFQ circuits were used to generate the data pulses and clock pulses. Input frequency of 10kHz and 1MHzwere used to generate the SFQ pulses from DC/SFQ circuits. Output data from OR gate moved to RS flip -Flop to display the output on the oscilloscope. We obtained bias margins of the D Flip -Flop and the Confluence Buffer from the measurements. The measured bias margins $\pm$38.6% and $\pm$23.2% for D Flip-Flop and Confluence Buffer, respectively The circuit was measured at the liquid helium temperature.

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CCD Image Sensor with Variable Reset Operation

  • Park, Sang-Sik;Uh, Hyung-Soo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.2
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    • pp.83-88
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    • 2003
  • The reset operation of a CCD image sensor was improved using charge trapping of a MOS structure to realize a loe voltage driving. A DC bias generating circuit was added to the reset structure which sets reference voltage and holds the signal charge to be detected. The generated DC bias is added to the reset pulse to give an optimized voltage margin to the reset operation, and is controlled by adjustment of the threshold voltage of a MOS transistor in the circuit. By the pulse-type stress voltage applied to the gate, the electrons and holes were injected to the gate dielectrics, and the threshold voltage could be adjusted ranging from 0.2V to 5.5V, which is suitable for controlling the incomplete reset operation due to the process variation. The charges trapped in the silicon nitride lead to the positive and negative shift of the threshold voltage, and this phenomenon is explained by Poole-Frenkel conduction and Fowler-Nordheim conduction. A CCD image sensor with $492(H){\;}{\times}{\;}510(V)$ pixels adopting this structure showed complete reset operation with the driving voltage of 3.0V. The resolution chart taken with the image sensor shows no image flow to the illumination of 30 lux, even in the driving voltage of 3.0V.

Novel Scanning Tunneling Spectroscopy for Volatile Adborbates

  • Choi, Eun-Yeoung;Lee, Youn-Joo;Lyo, In-Whan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.58-58
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    • 2010
  • Reactive or unstable adsorbates are often difficult to study spectroscopically. They may have, for instance, resonance states lying close to the Fermi level, inducing them to desorb or decompose by the probe itself, low-energy tunneling electrons. In order to overcome this limitation, we developed a novel method, which we call x-ramp scan. The method sweeps the bias voltage, with the simutaneous scan along the imaging direction, in a constant current mode. This mapping yields the tip-height variation as a function of bias, or Z(V), at nominally always fresh surface. We applied this method to the investigation of methanol-induced molecular features, attributed to methoxy, found on NiAl(110) surface. These were produced by methanol molecules deposited by a pulse injection method onto the metallic surface. Our study shows adsorbed methoxy are very reactive to the bias voltage, rendering the standard spectroscopy useless. Our new x-ramp scan shows that the decomposition of adsorbates occurs at the sample bias of 3.63 V, and proceeds with the lifetime of a few milliseconds. The details of the method will be provided at the discussion.

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Design and Fabrication of X-Band 50 W Pulsed SSPA Using Pulse Modulation and Power Supply Switching Method (펄스 변조 및 전원 스위칭 방법을 혼용한 X-대역 50 W Pulsed SSPA 설계 및 제작)

  • Kim, Hyo-Jong;Yoon, Myoung-Han;Chang, Pil-Sik;Kim, Wan-Sik;Lee, Jong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.4
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    • pp.440-446
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    • 2011
  • In this paper, a X-band 50 W pulsed solid state power amplifier(SSPA) is designed and fabricated for radar systems. The SSPA consists of a driver amplifier, a high power amplifier, and a pulse modulator. The high power stage employes four 25 W GaAs FET to deliver 50 W at X-band. To meet the stringent target specification for the SSPA, we used a new hybrid pulse switching method, which combine the advantage of pulse modulation and bias switching method. The fabricated SSPA shows a power gain of 44.2 dB, an output power of 50 W over a 1.12 GHz bandwidth. Also, pulse droop < 1 dB meet the design goals and a rise/fall time is less than 12.45 ns. Fabricated X-band pulsed SSPA size is compact with overall size of $150{\times}105{\times}30\;mm^3$.

A Study on A Multi-Pulse Linear Predictive Filtering And Likelihood Ratio Test with Adaptive Threshold (멀티 펄스에 의한 선형 예측 필터링과 적응 임계값을 갖는 LRT의 연구)

  • Lee, Ki-Yong;Lee, Joo-Hun;Song, Iick-Ho;Ann, Sou-Guil
    • The Journal of the Acoustical Society of Korea
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    • v.10 no.1
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    • pp.20-29
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    • 1991
  • A fundamental assumption in conventional linear predictive coding (LPC) analysis procedure is that the input to an all-pole vocal tract filter is white process. In the case of periodic inputs, however, a pitch bias error is introduced into the conventional LP coefficient. Multi-pulse (MP) LP analysis can reduce this bias, provided that an estimate of the excitation is available. Since the prediction error of conventional LP analysis can be modeled as the sum of an MP excitation sequence and a random noise sequence, we can view extracting MP sequences from the prediction error as a classical detection and estimation problem. In this paper, we propose an algorithm in which the locations and amplitudes of the MP sequences are first obtained by applying a likelihood ratio test (LRT) to the prediction error, and LP coefficients free of pitch bias are then obtained from the MP sequences. To verify the performance enhancement, we iterate the above procedure with adaptive threshold at each step.

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Plasma source ion implantations for shallow $p^+$/n junction

  • Jeonghee Cho;Seuunghee Han;Lee, Yeonhee;Kim, Lk-Kyung;Kim, Gon-Ho;Kim, Young-Woo;Hyuneui Lim;Moojin Suh
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.180-180
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    • 2000
  • Plasma source ion implantation is a new doping technique for the formation of shallow junction with the merits of high dose rate, low-cost and minimal wafer charging damage. In plasma source ion implantation process, the wafer is placed directly in the plasma of the appropriate dopant ions. Negative pulse bias is applied to the wafer, causing the dopant ions to be accelerated toward the wafer and implanted below the surface. In this work, inductively couples plasma was generated by anodized Al antenna that was located inside the vacuum chamber. The outside wall of Al chamber was surrounded by Nd-Fe-B permanent magnets to confine the plasma and to enhance the uniformity. Before implantation, the wafer was pre-sputtered using DC bias of 300B in Ar plasma in order to eliminate the native oxide. After cleaning, B2H6 (5%)/H2 plasma and negative pulse bias of -1kV to 5 kV were used to form shallow p+/n junction at the boron dose of 1$\times$1015 to 5$\times$1016 #/cm2. The as-implanted samples were annealed at 90$0^{\circ}C$, 95$0^{\circ}C$ and 100$0^{\circ}C$during various annealing time with rapid thermal process. After annealing, the sheet resistance and the junction depth were measured with four point probe and secondary ion mass spectroscopy, respectively. The doping uniformity was also investigated. In addition, the electrical characteristics were measured for Schottky diode with a current-voltage meter.

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A Modified Ramp Reset Waveform for High Contrast Ratio in AC PDPs

  • Kim, Jae-Sung;Yang, Jin-Ho;Ha, Chang-Hoon;Whang, Ki-Woong
    • Journal of Information Display
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    • v.3 no.4
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    • pp.13-18
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    • 2002
  • In general, the background light that is produced during the reset period deteriorates the dark room contrast ratio in AC PDP. In this paper, we propose a modified ramp reset pulse that can reduce the background light to an imperceptible level. In the new reset waveform, the discharges between the scan and sustain electrodes are minimized by applying a positive bias voltage to the sustain electrode and only the weak discharges between the scan and address electrodes are found to occur during the reset period. We also adopted the MgO coated phosphor layer to improve the address voltage margin that was reduced when the bias voltage in the modified ramp reset waveform was applied. As a result, the address voltage margin of 45 V which is the same level of the conventional method was ortained and the dark room contrast ratio was improved up to 7500 : 1.

Equivalent Noise Charge Measurements in Hydrogenated Amorphous Silicon Radiation Detectors

  • Kim, Ho-Kyung;Hur, Woo-Sung;Gyuseong Cho
    • Proceedings of the Korean Nuclear Society Conference
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    • 1995.05a
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    • pp.973-979
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    • 1995
  • The input equivalent noise charge (ENC) of hydrogenated amorphous silicon radiation detector diodes was measured and analyzed. The noise sources of amorphous silicon diodes were analyzed into three sources; shot noise, flicker noise and thermal noise from the contact resistance. By comparing the measured ENC with the calculated signal charge in uniform generation case, the signal-to-noise ratio (S/N) for the sample diodes is estimated as a function of the detector bias and the shaping time of Gaussian pulse shaper. The maximum S/N occurred at the bias level just above the full depletion voltage for shaping time of 2∼3 ${\mu}$sec. The developed method is useful in optimum design or amorphous silicon p-i-n diodes for charged particulate radiation spectroscopy.

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