• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.20 no.5
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• pp.673-678
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• 2011

For the wind-diesel hybrid electric power generation system equiped with two diesel generators, the diesel power sharing is studied analytically and a power sharing technique of less fuel consumption is developed. Based on the technique, as example, a diesel power sharing algorithm is suggested for two diesel generators of capacity 500Kw(200Kw+300Kw).

• Journal of Sensor Science and Technology
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• v.26 no.1
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• pp.60-65
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• 2017

This paper describes the low noise and low power IC using the opamp sharing technique for the capacitive micro-sensor sensing platform. The proposed IC reduces noise using correlated double sampling (CDS) and reduces power consumption using the opamp sharing technique. The IC is designed to be fully programmable, and can be digitally controlled by serial peripheral interface (SPI). The power consumption and the integrated input referred noise are 1.02 mW from a 3.3 V supply voltage and $0.164aF_{RMS}$ with a bandwidth of 400 Hz. The capacitive sensitivity, the input-output linearity and the figure of merits (FoM) are 2.5 mV/fF, 2.46 %FSO, and 8.4, respectively.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.9
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• pp.1706-1713
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• 2009

In this paper, a parallel operation algorithm for high power PEMFC generation systems is proposed. According to increasing the capacity of fuel cell systems with several fuel cell stacks, the different dynamic characteristics of each fuel cell stack effect on imbalance of load sharing and current distribution, so that a robust parallel operation algorithm is desired. Therefore, a power-sharing technique is developed and explained in order to design an optimal distributed PEMFC generation system. In addition, an optimal controller design procedure for the proposed parallel operation algorithm is introduced, along with informative simulations and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.2
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• pp.165-173
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• 2007

This paper introduces a new current sharing technique to Interleaved Boost Converter (IBC) using carrier slope control. The IBC is able to boost the input voltage and operates at higher current levels and has various advantages over a single power module. However, how to balance the current each module is still important problem. To solve this problem, the proposed technique can distribute the power and load current equally based on master-slave current sharing method. Unlike a conventional approach, this technique can be extended even though the current stress of switching components at slave modules is significantly smaller than that of the master module. The simulation and the experimental results are presented to show the validity.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.99-105
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• 2004

A shared-capacitor charge-sharing ROM (SCCS-ROM) using dummy bit lines is proposed. The SCCS-ROM reduces the bit line swing voltage using the charge-sharing technique of the conventional charge-sharing ROM (CS-ROM). Although the CS-ROM needs three small capacitors per output bit, the proposed SCCS-ROM shares the capacitors so that it needs only three capacitors. The SCCS-ROM implements the capacitors using dummy bit lines. This not only increases noise immunity but also reduces power. A SCCS-ROM with 8K${\times}$15bits implemented in a 0.35${\mu}{\textrm}{m}$ CMOS process. The SCCS-ROM consumes 8.63㎽ at 100MHz with 3.3V The simulation results show that the SCCS-ROM reduces 8.4% power compared to the CS-ROM.

• Journal of electromagnetic engineering and science
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• v.11 no.3
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• pp.183-185
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• 2011

A multiple charging method for a wireless power transfer system (WPTS) in the near-field region is proposed. We analyzed the frequency characteristics of multiple receivers in the near-field region. The results suggested that the time division WPTS can achieve efficient and equal power transmission at multiple receivers. We conclude that this system has an advantage for charging multiple receivers.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.585-592
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• 2003

The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between Inverters on synchronous d-q reference frame.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.7
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• pp.532-541
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• 2003

In a memory, most power is dissipated in high capacitive lines such as predecoder lines, word lines, and bit lines. To reduce the power dissipation in these high capacitive lines, this paper proposes three techniques using charge recycling and charge sharing. One is the charge recycling predecoder (CRPD). The second one is the charge recycling word line decoder (CRWD). The last one is the charge sharing bit line (CSBL) for a ROM. The CRPD and the CRWD recycle the previously used charge in predecoder lines and word lines. Theoretically, the power consumption in predecoder lines and word lines are reduced to a half. The CSBL reduces the swing voltage in the ROM bit lines to very small voltage using a charge sharing technique. the CSBL can significantly reduce the power dissipation in ROM bit lines. The CRPD, the CRWD, and the CSBL consume 82%, 72%, and 64% of the power of previous ROM designs respectively. A charge recycling and charge sharing ROM (CRCS-ROM) with the CRPD, the CRWD, and the CSBL is implemented. A CRCS-ROM with 8K16bits was fabricated in a 0.3${\mu}{\textrm}{m}$ CMOS process. The CRCS-ROM consumes 8.63㎽ at 100MHz with 3.3V. The chip core area is 0.1 $\textrm{mm}^2$.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.7
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• pp.363-368
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• 1999

The parallel operation system of multiple uninterruptible power supplies(UPSs) is used to increase power capacity of the system or to secure higher reliability at critical loads. In the parallel operation of the two UPSs, the load-sharing control to maintain the current balance between them is a key technique. Because a UPS has low output impedance and quick response characteristics, in case of an unbalanced load inverter output current changes very rapidly and thereby can instantaneously reach an overload condition. In this study, high precise load-sharing controller is proposed and implemented for the parallel operation system of two UPSs with low impedance characteristics and this controller controls the frequency and the voltage to minimize the active power component and the reactive power component which are gotten from the current difference between two UPSs. And then a good performance of the proposed method is verified by experiments in the parallel operation system with two 40KVA UPSs.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.531-534
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• 2005

This paper presents a new data line sharing technique for TFT-LCD panels. This technique reduces the number of data driver IC's to half by having two adjacent pixels share the same data line. This in turn doubles the number of gate lines, which are integrated directly on the glass substrate of amorphous silicon for further cost reduction and more compactness. The proposed technique with new pixel array structure was applied to 15.4 inch WXGA TFT-LCD panels and has proven that the number of driver IC's were halved with nearly 41% circuit cost reduction and 5.3% reduction in power consumption without degrading the image quality.