• 제목/요약/키워드: Power circuit design

검색결과 2,260건 처리시간 0.026초

低電力 MCU core의 設計에 對해

  • 안형근;정봉영;노형래
    • 전자공학회지
    • /
    • 제25권5호
    • /
    • pp.31-41
    • /
    • 1998
  • With the advent of portable electronic systems, power consumption has recently become a major issue in circuit and system design. Furthermore, the sophisticated fabrication technology makes it possible to embed more functions and features in a VLSI chip, consequently calling for both higher performance and lower power to deal with the ever growing complexity of system algorithms than in the past. VLSI designers should cope with two conflicting constraints, high performance and low power, offering an optimum trade off of these constraints to meet requirements of system. Historically, VLSI designers have focused on performance improvement, and power dissipation was not a design criteria but an afterthought. This design paradigm should be changed, as power is emerging as the most critical design constraint. In VLSI design, low power design can be accomplished through many ways, for instance, process, circuit/logic design, architectural design, and etc.. In this paper, a few low power design examples, which have been used in 8 bit micro-controller core, and can be used also in 4/16/32 bit micro-controller cores, are presented in the areas of circuit, logic and architectural design. We first propose a low power guidelines for micro-controller design in SAMSUNG, and more detailed design examples are followed applying 4 specific design guidelines. The 1st example shows the power reduction through reduction of number of state clocks per instruction. The 2nd example realized the power reduction by applying RISC(Reduced Instruction Set Computer) concept. The 3rd example is to optimize the algorithm for ALU(Arithmetic Logic Unit) to lower the power consumption, Lastly, circuit cells designed for low power are described.

  • PDF

Sub-threshold MOSFET을 이용한 전류모드 회로 설계 (Current-Mode Circuit Design using Sub-threshold MOSFET)

  • 조승일;여성대;이경량;김성권
    • 한국위성정보통신학회논문지
    • /
    • 제8권3호
    • /
    • pp.10-14
    • /
    • 2013
  • 본 논문에서는 저전력 기술인 DVFS (Dynamic Voltage Frequency Scaling) 응용을 위하여, 동작주파수의 변화에도 소비전력이 일정한 특성을 갖는 전류모드 회로를 적용함에 있어서, 저속 동작에서 소비전력이 과다한 전류모드 회로의 문제점을 전류모드 회로에서 sub-threshold 영역 동작의 MOSFET을 적용함으로써 소비전력을 최소화하는 설계기술을 소개한다. 회로설계는 MOSFET BSIM 3모델을 사용하였으며, 시뮬레이션한 결과, strong-inversion 동작일 때 소비전력은 $900{\mu}W$이었으나, sub-threshold 영역으로 동작하였을 때, 소비전력이 $18.98{\mu}W$가 되어, 98 %의 소비전력의 절감효과가 있음을 확인하였다.

Intelligent Power Module의 플로팅 게이트 전원 공급을 위한 전하 펌프 회로의 설계 (Design of Charge Pump Circuit for Floating Gate Power Supply of Intelligent Power Module)

  • 임정규;정세교
    • 전력전자학회논문지
    • /
    • 제13권2호
    • /
    • pp.135-144
    • /
    • 2008
  • 일반적으로 Intelligent power module (IPM)의 상부 스위치 구동을 위한 플로팅 전원 공급 방법으로 부트스트랩 회로가 많이 사용되고 있다. 부트스트랩 회로는 구성이 간단하고 집적화가 가능하다는 장점이 있으나 몇 가지 문제점을 가지고 있다. 상부 스위치 게이트 드라이버 회로에 전원을 공급하기 위해 매 주기마다 충분한 에너지를 충전할 수 있는 시간이 요구되며, 충전된 에너지는 한정적이므로 스위치 턴 온 (turn-on)시간의 제한을 갖게 된다. 그리고 주파수가 낮아질수록 부트스트랩 커패시터 용량이 증가하여 집적화에 장애요인이 된다. 이러한 단점은 전하 펌프 회로를 사용함으로써 보완될 수 있다. 본 논문에서는 IPM의 플로팅 전원 공급 방법으로 전하 펌프 회로를 적용하여 분석하였으며, 이러한 분석을 기반으로 전하 펌프 회로의 설계 방법을 제안하였다. 분석과 제안된 설계 방법의 타당성을 검증하기 위하여 시뮬레이션과 실험을 수행하였으며, 제시된 결과는 제안된 설계 방법의 유용성을 입증하였다.

Broadband Impedance Matching Circuit Design for PLC Coupler Using Tchebycheff Equalizer

  • Kim, Gi-Rae;Tangyao, Xie
    • Journal of information and communication convergence engineering
    • /
    • 제7권2호
    • /
    • pp.113-118
    • /
    • 2009
  • This paper is about design broadband impedance matching circuit for Coupler to improve power transfer efficiency in the power line communication (PLC) system. The Tchebycheff gain function algorithm is represented to design broadband matching circuit. A practical PLC Coupler impedance matching circuit is designed, and the characteristics for S11 and S21 of PLC coupler are enhanced comparing with unmatched one. This is done by maximizing the power transfer gain from modem to the load.

Design of Broadband Impedance Matching Circuit for PLC Coupler using Butterworth Equalizer

  • Xie, Tangyao;Kim, Gi-Rae
    • Journal of information and communication convergence engineering
    • /
    • 제8권3호
    • /
    • pp.258-262
    • /
    • 2010
  • This paper represents design broadband impedance matching circuit for Coupler to improve power transfer efficiency in the broadband power line communication(BPLC) systems. The Butterworth gain function equalizer is used to design broadband matching circuit. A practical PLC Coupler impedance matching circuit is designed, and the characteristics for S11 and S21 of PLC Coupler are enhanced comparing with unmatched one. This is done by maximizing the power transfer gain from modem to the load.

Design of Bootstrap Power Supply for Half-Bridge Circuits using Snubber Energy Regeneration

  • Chung, Se-Kyo;Lim, Jung-Gyu
    • Journal of Power Electronics
    • /
    • 제7권4호
    • /
    • pp.294-300
    • /
    • 2007
  • This paper deals with a design of a bootstrap power supply using snubber energy regeneration, which is used to power a high-side gate driver of a half-bridge circuit. In the proposed circuit, the energy stored in the low-side snubber capacitor is transferred to the high-side bootstrap capacitor without any magnetic components. Thus, the power dissipation in the RCD snubber can be effectively reduced. The operation principle and design method of the proposed circuit are presented. The experimental results are also provided to show the validity of the proposed circuit.

능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구 (A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits)

  • 백기호;박성민;정교범
    • 전력전자학회논문지
    • /
    • 제24권3호
    • /
    • pp.181-190
    • /
    • 2019
  • Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

실린더 페라이트 코어를 사용한 무접점 전력 변환 시스템 (A Contactless Power Conversion System Use a Slinder Ferrite Core)

  • 이승준;안재우
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2001년도 전력전자학술대회 논문집
    • /
    • pp.638-641
    • /
    • 2001
  • Connectorless power transmission and supply are the power transfer device revealed by resonant inverter or transformer using inductant device. Recently, on power supply have been going on frequently, so several power supply circuit forms are announced. But Compared with the circuit of previous paper, instead of the circuit composed of a simple sylinder Ferrit, I was manufacture in a sylinder that It was a double overlab to a sylinder and I was followed a double flux in inner flux path. Above all, for practicalization, supply circuit operation character analysis and development of controller should be preceded. According to this paper, power transmission and supply analyze characters and design control circuit like the analysis of general resonant inverter for power transmission. They compose the circuit to get sinusoid wave output voltage using pulse width modulation control mode. For Supply, output wave form through power track and power pick-up of magnetic inductance includes ripper component. So I intend to design the controller including filter and regulator, compare analyze theoretical result with real measurement value and then show you their practicality

  • PDF

전술다기능단말기(TMFT)의 전원회로 설계 개선 및 검증 (Improvement and Verification of TMFT Power Circuit Design)

  • 김진성;김병준;김병수
    • 한국전자통신학회논문지
    • /
    • 제15권2호
    • /
    • pp.357-362
    • /
    • 2020
  • 군 전술정보통신체계(TICN: Tactical Information and Communication Network)의 하위체계라 할 수 있는 전술다기능단말기(TMFT: Tactical Multi-Functional Terminal)는 개인 사용자에게 음성통화, 데이터 송수신, 멀티미디어 서비스를 제공하는 체계이다. 2011년도 개발당시 전술다기능단말기 전원회로는 충전IC를 거쳐 각각의 소자에 전원을 공급하는 구조였으나, 새로 개선된 전원회로는 충전IC를 별도로 구성하지 않고 PMIC(Power Management Integrated Circuit)를 통해 각 소자에 전원이 공급되도록 하였다. 본 논문에서는 개발단계의 전원회로설계가 적용된 전술다기능단말기와 신규 PMIC를 적용한 전술다기능단말기의 전원구조를 비교하였다. 그리고 소비전류, 충전시간, 충전 시 단말기 온도상승 등의 성능평가를 통해서 설계 개선 및 부품의 적합성을 검증하였다.

저감된 DC Link Capacitor 부피를 가지는 역률 개선 Valley-Fill Flyback 컨버터의 설계 및 구현 (Practical Design and Implementation of a Power Factor Correction Valley-Fill Flyback Converter with Reduced DC Link Capacitor Volume)

  • 김세민;강경수;공성재;유혜미;노정욱
    • 전력전자학회논문지
    • /
    • 제22권4호
    • /
    • pp.277-284
    • /
    • 2017
  • For passive power factor correction, the valley fill circuit approach is attractive for low power applications because of low cost, high efficiency, and simple circuit design. However, to vouch for the product quality, two dc-link capacitors in the valley fill circuit should be selected to withstand the peak rectified ac input voltage. The common mode (CM) and differential mode (DM) choke should be used to suppress the electromagnetic interference (EMI) noise, thereby resulting in large size volume product. This paper presents the practical design and implementation of a valley fill flyback converter with reduced dc link capacitors and EMI magnetic volumes. By using the proposed over voltage protection circuit, dc-link capacitors in the valley fill circuit can be selected to withstand half the peak rectified ac input voltage, and the proposed CM/DM choke can be successfully adopted. The proposed circuit effectiveness is shown by simulation and experimentally verified by a 78W prototype.