• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.5
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• pp.25-33
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• 2011

This work proposes a skinny-type 10b 50MS/s 0.13um CMOS three-step pipeline ADC for CIS applications. Analog circuits for CIS applications commonly employ a high supply voltage to acquire a sufficiently acceptable dynamic range, while digital circuits use a low supply voltage to minimize power consumption. The proposed ADC converts analog signals in a wide-swing range to low voltage-based digital data using both of the two supply voltages. An op-amp sharing technique employed in residue amplifiers properly controls currents depending on the amplification mode of each pipeline stage, optimizes the performance of op-amps, and improves the power efficiency. In three FLASH ADCs, the number of input stages are reduced in half by the interpolation technique while each comparator consists of only a latch with low kick-back noise based on pull-down switches to separate the input nodes and output nodes. Reference circuits achieve a required settling time only with on-chip low-power drivers and digital correction logic has two kinds of level shifter depending on signal-voltage levels to be processed. The prototype ADC in a 0.13um CMOS to support 0.35um thick-gate-oxide transistors demonstrates the measured DNL and INL within 0.42LSB and 1.19LSB, respectively. The ADC shows a maximum SNDR of 55.4dB and a maximum SFDR of 68.7dB at 50MS/s, respectively. The ADC with an active die area of 0.53$mm^2$ consumes 15.6mW at 50MS/s with an analog voltage of 2.0V and two digital voltages of 2.8V ($=D_H$) and 1.2V ($=D_L$).

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.115-116
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• 2012

The demand for flexible electronic systems such as wearable computers, E-paper, and flexible displays has increased due to their advantages of excellent portability, conformal contact with curved surfaces, light weight, and human friendly interfaces over present rigid electronic systems. This seminar introduces three recent progresses that can extend the application of high performance flexible inorganic electronics. The first part of this seminar will introduce a RRAM with a one transistor-one memristor (1T-1M) arrays on flexible substrates. Flexible memory is an essential part of electronics for data processing, storage, and radio frequency (RF) communication and thus a key element to realize such flexible electronic systems. Although several emerging memory technologies, including resistive switching memory, have been proposed, the cell-to-cell interference issue has to be overcome for flexible and high performance nonvolatile memory applications. The cell-to-cell interference between neighbouring memory cells occurs due to leakage current paths through adjacent low resistance state cells and induces not only unnecessary power consumption but also a misreading problem, a fatal obstacle in memory operation. To fabricate a fully functional flexible memory and prevent these unwanted effects, we integrated high performance flexible single crystal silicon transistors with an amorphous titanium oxide (a-TiO2) based memristor to control the logic state of memory. The $8{\times}8$ NOR type 1T-1M RRAM demonstrated the first random access memory operation on flexible substrates by controlling each memory unit cell independently. The second part of the seminar will discuss the flexible GaN LED on LCP substrates for implantable biosensor. Inorganic III-V light emitting diodes (LEDs) have superior characteristics, such as long-term stability, high efficiency, and strong brightness compared to conventional incandescent lamps and OLED. However, due to the brittle property of bulk inorganic semiconductor materials, III-V LED limits its applications in the field of high performance flexible electronics. This seminar introduces the first flexible and implantable GaN LED on plastic substrates that is transferred from bulk GaN on Si substrates. The superb properties of the flexible GaN thin film in terms of its wide band gap and high efficiency enable the dramatic extension of not only consumer electronic applications but also the biosensing scale. The flexible white LEDs are demonstrated for the feasibility of using a white light source for future flexible BLU devices. Finally a water-resist and a biocompatible PTFE-coated flexible LED biosensor can detect PSA at a detection limit of 1 ng/mL. These results show that the nitride-based flexible LED can be used as the future flexible display technology and a type of implantable LED biosensor for a therapy tool. The final part of this seminar will introduce a highly efficient and printable BaTiO3 thin film nanogenerator on plastic substrates. Energy harvesting technologies converting external biomechanical energy sources (such as heart beat, blood flow, muscle stretching and animal movements) into electrical energy is recently a highly demanding issue in the materials science community. Herein, we describe procedure suitable for generating and printing a lead-free microstructured BaTiO3 thin film nanogenerator on plastic substrates to overcome limitations appeared in conventional flexible ferroelectric devices. Flexible BaTiO3 thin film nanogenerator was fabricated and the piezoelectric properties and mechanically stability of ferroelectric devices were characterized. From the results, we demonstrate the highly efficient and stable performance of BaTiO3 thin film nanogenerator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.5-5
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• 2009

Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

• Journal of IKEEE
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• v.22 no.1
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• pp.180-184
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• 2018

Gallium oxide ($Ga_2O_3$) and silicon carbide (SiC) are the material with the wide band gap ($Ga_2O_3-4.8{\sim}4.9eV$, SiC-3.3 eV). These electronic properties allow high blocking voltage. In this work, we investigated the characteristic of $Ga_2O_3$ and 4H-SiC vertical depletion-mode metal-oxide-semiconductor field-effect transistors. We demonstrated that the blocking voltage and on-resistance of vertical DMOSFET is dependent with structure. The structure of $Ga_2O_3$ and 4H-SiC vertical DMOSFET was designed by using a 2-dimensional device simulation (ATLAS, Silvaco Inc.). As a result, 4H-SiC and $Ga_2O_3$ vertical DMOSFET have similar blocking voltage ($Ga_2O_3-1380V$, SiC-1420 V) and then when gate voltage is low, $Ga_2O_3-DMOSFET$ has lower on-resistance than 4H-SiC-DMOSFET, however, when gate voltage is high, 4H-SiC-DMOSFET has lower on-resistance than $Ga_2O_3-DMOSFET$. Therefore, we concluded that the material of power device should be considered by the gate voltage.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.256-256
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• 2016

기존의 디스플레이 기슬은 마스크를 통해 특정 부분에만 유기재료를 증착시키는 방법을 사용하였으나, 기판의 크기가 커짐에 따라 공정조건에 제약이 발생하였다. 이를 해결하기 위해 최근 용액 공정에 대한 연구가 활발히 진행되고 있다. 용액 공정은 기존 진공 증착 방식과 비교하였을 때 상온, 대기압에서 증착이 가능하며 경제적이고, 대면적 균일 증착에 유리하다는 장점이 있다. 반면, 용액 공정으로 제작한 소자는 시간이 지남에 따라 점차 전기적 특성이 변하는 aging effect를 보인다. Aging effect는 용액에 포함된 C기와 OH기 기반의 불순물의 영향으로 시간의 경과에 따라서 문턱전압, subthreshold swing 및 mobility 등의 전기적 특성이 변하는 현상으로 고품질의 박막을 형성하기 위해서는 고온의 열처리가 필요하다. 지금까지 고품질 박막 형성을 위한 열처리는 퍼니스 (furnace) 장비에서 주로 이루어졌는데, 시간이 오래 걸리고, 상대적으로 고온 공정이기 때문에 유리, 종이, 플라스틱과 같은 다양한 기판에 적용하기 어렵다는 단점이 있다. 따라서, 본 연구에서는 $100^{\circ}C$ 이하의 저온에서도 열처리가 가능한 microwave irradiation (MWI) 방법을 이용하여 solution-processed InGaZnO TFT를 제작하였고, 기존의 열처리 방식인 furnace로 열처리한 TFT 소자와 aging effect를 비교하였다. 먼저, solution-processed IGZO TFT를 제작하기 위해 p type Si 기판을 열산화시켜서 100 nm의 SiO2 게이트 산화막을 성장시켰고, 스핀코팅 방법으로 a-IGZO 채널층을 형성하였다. 증착후 열처리를 위하여 1000 W의 마이크로웨이브 출력으로 15분간 MWI를 실시하여 a-IGZO TFT를 제작하였고, 비교를 위하여 furnace N2 gas 분위기에서 $600^{\circ}C$로 30분간 열처리한 TFT를 준비하였다. 제작된 직후의 TFT 특성을 평가한 결과, MWI 열처리한 소자가 퍼니스 열처리한 소자보다 높은 이동도, 낮은 subthreshold swing (SS)과 히스테리시스 전압을 가지는 것을 확인하였다. 한편, aging effect를 평가하기 위하여 제작 후에 30일 동안의 특성변화를 측정한 결과, MWI 열처리 소자는 30일 동안 문턱치 전압(VTH)의 변화량 ${\Delta}VTH=3.18[V]$ 변화되었지만, furnace 열처리 소자는 ${\Delta}VTH=8.56[V]$로 큰 변화가 있었다. 다음으로 SS의 변화량은 MWI 열처리 소자가 ${\Delta}SS=106.85[mV/dec]$인 반면에 퍼니스 열처리 소자는 ${\Delta}SS=299.2[mV/dec]$이었다. 그리고 전하 트래핑에 의해서 발생하는 게이트 히스테리시스 전압의 변화량은 MWI 열처리 소자에서 ${\Delta}V=0.5[V]$이었지만, 퍼니스 열처리 소자에서 ${\Delta}V=5.8[V]$의 큰 수치를 보였다. 결과적으로 MWI 열처리 방식이 퍼니스 열처리 방식보다 소자의 성능이 우수할 뿐만 아니라 aging effect가 개선된 것을 확인할 수 있었고 차세대 디스플레이 공정에 있어서 전기적, 화학적 특성을 개선하는데 기여할 것으로 기대된다.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.27-37
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• 1999

A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.98-103
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• 2013

In this work, we investigated the enhanced performance of IZO-based TFTs with $HfSiO_x$ gate insulators. Four types of $HfSiO_x$ gate insulators using different diposition powers were deposited by co-sputtering $HfO_2$ and Si target. To simplify the processing sequences, all of the layers composing of TFTs were deposited by rf-magnetron sputtering method using patterned shadow-masks without any intentional heating of substrate and subsequent thermal annealing. The four different $HfSiO_x$ structural properties were investigated x-ray diffraction(XRD), atomic force microscopy(AFM) and also analyzed the electrical characteristics. There were some noticeable differences depending on the composition of the $HfO_2$ and Si combination. The TFT based on $HfSiO_x$ gate insulator with $HfO_2$(100W)-Si(100W) showed the best results with a field effect mobility of 2.0[$cm^2/V{\cdot}s$], a threshold voltage of -0.5[V], an on/off ratio of 5.89E+05 and RMS of 0.26[nm]. This show that the composition of the $HfO_2$ and Si is an important factor in an $HfSiO_x$ insulator. In addition, the effective bonding of $HfO_2$ and Si reduced the defects in the insulator bulk and also improved the interface quality between the channel and the gate insulator.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.993-994
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• 2008

Electrochromic (EC) devices are capable of reversibly changing their optical properties upon charge injection and extraction induced by the external voltage. The characteristics of the EC device, such as low power consumption, high coloration efficiency, and memory effects under open circuit status, make them suitable for use in a variety of applications including smart windows and electronic papers. Coloration due to reduction or oxidation of redox chromophores can be used for EC devices (e-paper), but the switching time is slow (second level). Recently, with increasing demand for the low cost, lightweight flat panel display with paper-like readability (electronic paper), an EC display technology based on dye-modified $TiO_2$ nanoparticle electrode was developed. A well known organic dye molecule, viologen, was adsorbed on the surface of a mesoporous $TiO_2$ nanoparticle film to form the EC electrode. On the other hand, ZnO is a wide bandgap II-VI semiconductor which has been applied in many fields such as UV lasers, field effect transistors and transparent conductors. The bandgap of the bulk ZnO is about 3.37 eV, which is close to that of the $TiO_2$ (3.4 eV). As a traditional transparent conductor, ZnO has excellent electron transport properties, even in ZnO nanoparticle films. In the past few years, one-dimension (1D) nanostructures of ZnO have attracted extensive research interest. In particular, 1D ZnO nanowires renders much better electron transportation capability by providing a direct conduction path for electron transport and greatly reducing the number of grain boundaries. These unique advantages make ZnO nanowires a promising matrix electrode for EC dye molecule loading. ZnO nanowires grow vertically from the substrate and form a dense array (Fig. 1). The ZnO nanowires show regular hexagonal cross section and the average diameter of the ZnO nanowires is about 100 nm. The cross-section image of the ZnO nanowires array (Fig. 1) indicates that the length of the ZnO nanowires is about $6\;{\mu}m$. From one on/off cycle of the ZnO EC cell (Fig. 2). We can see that, the switching time of a ZnO nanowire electrode EC cell with an active area of $1\;{\times}\;1\;cm^2$ is 170 ms and 142 ms for coloration and bleaching, respectively. The coloration and bleaching time is faster compared to the $TiO_2$ mesoporous EC devices with both coloration and bleaching time of about 250 ms for a device with an active area of $2.5\;cm^2$. With further optimization, it is possible that the response time can reach ten(s) of millisecond, i.e. capable of displaying video. Fig. 3 shows a prototype with two different transmittance states. It can be seen that good contrast was obtained. The retention was at least a few hours for these prototypes. Being an oxide, ZnO is oxidation resistant, i.e. it is more durable for field emission cathode. ZnO nanotetropods were also applied to realize the first prototype triode field emission device, making use of scattered surface-conduction electrons for field emission (Fig. 4). The device has a high efficiency (field emitted electron to total electron ratio) of about 60%. With this high efficiency, we were able to fabricate some prototype displays (Fig. 5 showing some alphanumerical symbols). ZnO tetrapods have four legs, which guarantees that there is one leg always pointing upward, even using screen printing method to fabricate the cathode.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.465-469
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• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

• Journal of IKEEE
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• v.11 no.4
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• pp.152-157
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• 2007

AlGaN/GaN high electron mobility transistors (HEMTs) were fabricated and the effect of ${N_2}O$ plasma on the electrical characteristics of the devices was investigated. The HEMT exposed to ${N_2}O$ plasma formed by 40 W of RF power in a chamber with pressure of 20 mTorr at a temperature of $200^{\circ}C$, exhibited a reduction of gate leakage current from 246 nA to 1.2 pA by 10 seconds treatment. The current between the two isolated active regions reduced from 3 uA to 7 nA and the sheet resistance of the active layer was lowered also. The variations of electrical characteristics for HEMT were occurred within a short time expose of 10 seconds and the successive expose did not influence on the improvements of gate leakage characteristics and conductivity of the active region. The reduced leakage current level was not varied by successive $SiO_2$ deposition and its removal. The transconductnace and drain current of AlGaN/GaN HEMTs were increased also by the expose to the ${N_2}O$ plasma.