• Nuclear Engineering and Technology
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• v.56 no.2
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• pp.568-574
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• 2024

The development of radiation-tolerant radio-frequency (RF) systems can be a solution for applications in extreme radiation environments, such as nuclear power plant monitoring and space exploration. Among the crucial components within an RF system, the low noise amplifier (LNA) stands out due to its vulnerability to TID effects, mainly relying on transistors as its main devices. In this study, the TID effects in the LNA using standard 0.18 ㎛ complementary metal oxide semiconductors (CMOS) technology are estimated and analyzed. The results show that the LNA can withstand absorbed radiation up to 100 kGy. The S₂₁, S₁₁, noise figure (NF), stability (K), and linearity of the third input intercept point (IIP3) slightly shifted from the initial values of 0.8312 dB, 0.793 dB, 0.00381 dB, 1.34406, and 2.36066 dBm, respectively which are still comparable to the typical performances. Moreover, the standard 0.18 ㎛ technology has demonstrated its radiation tolerance, as it exhibits negligible performance degradation in the conventional LNA even when exposed to radiation levels up to 100 kGy. In this context, simulation approach offers a means to predict the TID effects and estimate the radiation exposure limit for electronic devices, particularly when transistors are used as the primary RF components.

• Journal of the Korea Society for Simulation
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• v.4 no.2
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• pp.41-60
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• 1995

The IGBT(Insulated Gate Bipolar Transistor) is a power semiconductor device that has gained acceptance among circuit design engineers for motor drive and power converter applications. IGBT devices(International Rectifier, Proposed proposed model etc) have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirememts and high current density capability. When designing circuit and systems that utilize IGBTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The interaction of the IGBT with the load circuit can be described using the device model and the state equation of the load circuit. The voltage rise rate at turn-off for inductive loads varies significantly for IGBTs with different base life times, and this rate of rise is important in determing the voltage overshoot for a given series resistor-inductor load circuit. Excessive voltage overshoot is potentially destructive, so a snubber protection circuit may be required. The protection circuit requirements are unique for the IGBT and can be examined using the model. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

• IEIE Transactions on Smart Processing and Computing
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• v.2 no.4
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• pp.248-254
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• 2013

The size and power consumption of digital circuits including the dimming circuit part will increase for high-performance solid state lighting (SSL) systems in the future. This study examined the low-power consumption of adiabatic dynamic CMOS logic (ADCL) due to the principles of adiabatic charging. Furthermore, the designed low-power ADCL digital pulse width modulation (PWM) was optimized for SSL dimming systems. For this purpose, an ADCL digital 3-bit PWM was optimized in two steps. In the first step, the architecture of the ADCL digital 3-bit PWM was miniaturized. In the second step, the clock cut-off circuit was designed and added to the ADCL PWM. As a result, compared to the original configuration, 60 transistors and 15 capacitors of ADCL digital 3-bit PWM were reduced for miniaturization. Moreover, the clock cut-off circuit, which controls wake-up and sleep mode of ADCL D-FFs, was designed. The power consumption of an optimized ADCL digital PWM for all bit patterns decreased by 54 %.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.138-141
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• 2009

Progress in the development of a fully roll-to-roll selfaligned imprint process for producing active matrix backplanes with submicron aligned features on flexible substrates is reported. High performance transistors, crossovers and addressable active matrix arrays have been designed and fabricated using imprint lithography. Such a process has the potential of significantly reducing the costs of large area displays. The progress, current status and remaining issues of this new fabrication technology are reported.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.8
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• pp.674-677
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• 2011

The dependency of sputtering power on the electrical performances in amorphous HIZO-TFT (hafnium-indium-zinc-oxide thin film transistors) has been investigated. The HIZO channel layers were prepared by using radio frequency (RF) magnetron sputtering method with different sputtering power at room temperature. TOF-SIMS (time of flight secondary ion mass spectrometry) was performed to confirm doping of hafnium atom in IZO film. The field effect mobility (${\mu}FE$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing sputtering power. This result can be attributed to the high energy particles knocking-out oxygen atoms. As a result, oxygen vacancies generated in HIZO channel layer with increasing sputtering power resulted in negative shift in Vth and increase in on-current.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1912-1919
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• 2018

The output capacitance of power semiconductor devices is important in determining the switching losses and in the operation of some resonant converter topologies. Thus, it is important to be able to accurately determine the output capacitance of a particular device operating at elevated power levels so that the contribution of the output capacitance discharge to switch-on losses can be determined under these conditions. Power semiconductor switch manufacturers usually measure device output capacitance using small-signal methods that may be insufficient for power switching applications. This paper shows how first principle methods are applied in a novel way to obtain more relevant large signal output capacitances of Gallium-Nitride (GaN) FETs using the drain-source voltage transient during device switch-off numerically. A non-linear capacitance for an increase in voltage is determined with good correlation. Simulations are verified using experimental results from two different devices. It is shown that the large signal output capacitance as a function of the drain-source voltage is higher than the small signal values published in the data sheets for each of the devices. It can also be seen that the loss contribution of the output capacitance discharging in the channel during switch-on correlates well with other methods proposed in the literature, which confirms that the proposed method has merit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.1-5
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• 2009

A new pixel circuit for Active Matrix Organic Light Emitting Diodes (AMOLEDs), based on the polycrystalline silicon thin film transistors (Poly-Si TFTs), was proposed and verified by SMART SPICE simulation. One driving and six switching TFTs and one storage capacitor were used to improve display image uniformity without any additional control signal line. The proposed pixel circuit compensates an inevitable threshold voltage variation of Poly-Si TFTs and also compensates the degradation of OLED at low power supply voltage($V_{DD}$). The simulation results show that the proposed pixel circuit successfully compensates the variation of OLED driving current within 0.8% compared with 20% of the conventional pixel circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.29-34
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• 2004

This paper reports the RF dispersion and linearity characteristics of unpassivated AlGaN/InGaN/GaN high electron-mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE). The devices with a 0.5 ${\mu}{\textrm}{m}$ gate-length exhibited relatively good DC characteristics with a maximum drain current of 730 mA/mm and a peak g$_{m}$ of 156 mS/mm. Highly linear characteristic was observed by relatively flat DC transconductance (g$_{m}$) and good inter-modulation distortion characteristics, which indicates tight channel carrier confinement of the InGaN channel. Little current collapse in pulse I-V and load-pull measurements was observed at elevated temperatures and a relatively high power density of 1.8 W/mm was obtained at 2 GHz. These results indicate that current collapse related with surface states will not be a power limiting factor for the AlGaN/InGaN HEMTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.82-85
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• 2008

We are working towards large-area arrays of thin film transistors on polymer substrates using roll-to-roll (R2R) processes exclusively. Self-aligned imprint lithography (SAIL) is an enabler to pattern and align submicron features on meter-scaled flexible substrates in the R2R environment. The progress, current status and remaining issues of this new fabrication technology are presented.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.553-554
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• 2006

In this paper, 77 GHz CPW power amplifier MMIC, which are consisted of a 2 stage driver stage and a power stage employing $8{\times}50um$ gate width, have been successfully developed by using 120nm $In_{0.4}AlAs/In_{0.35}GaAs$ Metamorphic high electron mobility transistors (MHEMTs). The devices show an extrinsic transconductance $g_m$ of 660 mS/mm, a maximum drain current of 700 mA/mm, and a gate drain breakdown voltage of -8.5 V. A cut-off frequency ($f_T$) of 172 GHz and a maximum oscillation frequency ($f_{max}$) of over 300 GHz are achieved. The fabricated PA exhibited high power gain of 20dB only with 3 stages. The output power is measured to be 12.5 dBm.